ADC Gain Control Using a Parallel Fast Detection Loop
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Solution Overview
Problem
Conventional analog-to-digital converters (ADCs) face issues with high power consumption and noise introduction due to the use of processors for automatic gain control, and they often experience delays in responding to changes in analog input signals, which can be problematic in low-power applications like battery monitoring.
Innovation Solution
The implementation of a fast digital detection loop within the ADC that operates in parallel to the conversion path, allowing for automatic gain control without analog comparators, and the use of masking circuits to suppress transients during gain changes, thereby reducing power consumption and improving response time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Extent of automation
If a processor is used for automatic gain control in conventional ADC systems, then gain adjustment functionality is provided, but power consumption increases and noise is introduced
Solution Approach 1:
The patent replaces the processor-based automatic gain control system with a dedicated digital detection loop that operates autonomously. The detection loop uses simple digital logic circuits to monitor signal levels and control PGA gain without requiring a processor, thereby eliminating the high power consumption and noise associated with processor operation while maintaining automatic gain adjustment functionality.
Solution Approach 2:
The patent extracts the gain control functionality from the main processor and implements it as a separate, dedicated digital detection loop. This extracted subsystem handles only the specific task of detecting signal levels and adjusting PGA gain, removing the burden from the processor and enabling low-power operation for this specific function.
2Extent of automation
If a processor is used for automatic gain control, then gain adjustment is achieved, but noise is introduced into the system
Solution Approach 1:
The patent substitutes the processor-based control system with a dedicated digital detection loop that uses simple digital logic to monitor signal levels and control PGA gain. This replacement eliminates the noise generated by processor operation while preserving the automatic gain control functionality.
3Measurement precision
If conventional filter/decimator is used for signal processing, then accurate digital conversion is achieved, but delay occurs between analog input change and output
Solution Approach 1:
The patent segments the signal processing function into two parallel paths: a fast detection loop that provides rapid response for gain control decisions, and a main conversion path that maintains high accuracy. The fast loop uses simplified filtering with lower oversampling ratios to quickly detect signal level changes and trigger PGA gain adjustments, while the main path continues to provide accurate digital conversion.
Solution Approach 2:
The patent implements preliminary detection of signal level changes through the fast digital detection loop before the main conversion path would normally detect them. This preliminary action allows the system to proactively adjust PGA gain in response to incoming signal changes, reducing the overall response delay while the main conversion path continues to ensure accurate digital conversion results.
Data Source
AI summary
A method can include, amplifying an analog input signal to generate an amplified analog signal; modulating the amplified analog signal into a digital data stream; filtering the digital data stream with a first digital filter to generate a first filtered data stream, and selectively changing a gain of the amplifier in response to the first filtered data stream. While the digital data stream is filtered with the first digital filter, the digital data stream is filtered with a second digital filter to generate a second filtered data stream. An output digital value corresponding to the analog input signal in response to the second filtered data stream. Corresponding systems and devices are also disclosed.