ADC Power Converter Frequency Offset to Prevent Harmonic Aliasing
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Solution Overview
Problem
Current high-current measurement technologies lack integrated, isolated power supplies and suffer from noise and aliasing issues due to internal clock and externally-sourced power signal interference.
Innovation Solution
A system comprising a frequency generator producing a second clock signal offset from a first clock signal, a power converter generating a power signal corresponding to the second frequency, and an analog-to-digital converter (ADC) powered by this signal, with electrical isolation between components to mitigate noise and aliasing, using a phase-locked loop (PLL) and transformers for isolation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an ADC is powered by an externally-sourced power signal, then the ADC can operate, but noise and aliasing problems occur due to interference between internal clocks and power signals
Solution Approach 1:
The patent combines the power converter and ADC into a single integrated device, where the power converter is electrically coupled to the ADC. This integration ensures that the power signal frequency is coordinated with the ADC's internal clock frequency, preventing noise and aliasing while maintaining compact design.
Solution Approach 2:
The patent changes the frequency parameter of the power signal to be different from the ADC's internal clock frequency. The power converter is configured to provide a power signal at a frequency that does not coincide with the ADC sampling frequency or its harmonics, thereby eliminating interference and aliasing effects.
2Measurement precision
If high currents are measured using shunt resistors, then current measurement is achieved, but exposure to high currents poses safety risks to people and other systems
Solution Approach 1:
The patent segments the measurement system into isolated functional blocks: the shunt resistor carries the high current in a protected configuration, while the ADC and power converter are electrically isolated from the high-current path. This segmentation allows accurate measurement of voltages across the shunt without exposing sensitive components or personnel to dangerous current levels.
3Use of energy by moving object
If the power signal frequency matches the ADC sampling frequency, then power efficiency is improved, but harmonic overlap causes interference and measurement errors
Solution Approach 1:
The patent explicitly changes the frequency parameter relationship between power signal and ADC sampling. The power converter is configured to operate at a frequency that is a sub-multiple of the ADC sampling frequency, ensuring that harmonics do not overlap. This frequency coordination maintains power efficiency while preventing measurement errors.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively powers the ADC with a frequency signal that avoids harmonic overlap, reducing noise and aliasing, and allows for accurate current measurement across a shunt resistor while maintaining electrical isolation.
Implementation Method 1
The power converter comprises a transformer to achieve electrical isolation between at least two of the dies among which the power converter is distributed
Implementation Method 2
a phase-locked loop (PLL) configured to generate a second clock signal having a second frequency based on a first clock signal having a first frequency. The second frequency is offset from the first frequency and each of a plurality of harmonic frequencies of the second frequency is offset from at least one harmonic frequency of the first frequency
Implementation Method 3
an analog-to-digital converter (ADC) configured to receive the first clock signal from the clock receiver and to sample and convert electrical measurements at the first frequency
Data Source
AI summary
In at least some embodiments, a system comprises a frequency generator configured to generate a second clock signal having a second frequency using a first clock signal having a first frequency. The second frequency is offset from the first frequency and each of a plurality of harmonic frequencies of the second frequency is offset from a harmonic frequency of the first frequency. The system also includes a power converter configured to produce a power signal that at least partially corresponds to the second frequency. The system further comprises an analog-to-digital converter (ADC) configured to sample and convert analog voltages at the first frequency. The ADC is powered by the power signal.