ADC Gain Control With Time-Aligned Digital Scaling
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Solution Overview
Problem
Current digital receiver architectures face limitations in automatic gain control, particularly in maintaining dynamic range and preventing signal corruption during attenuation switching, which disrupts data collection and post-processing accuracy.
Innovation Solution
The implementation of Firmware Level Control (FLC) synchronizes analog and digital domain adjustments, using high-speed attenuators and decimation parameters to minimize signal corruption, allowing for on-line gain adjustments and continuous monitoring to ensure optimal ADC operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional Automatic Level Control (ALC) is used to adjust analog gain for optimum ADC performance, then ADC dynamic range utilization is improved, but the receiver must be halted for gain changes and alignment, interrupting data collection
Solution Approach 1:
The patent replaces the traditional mechanical approach of halting the receiver to adjust analog gain with a digital signal processing solution. A gain alignment factor is calculated in the digital domain and applied to scale the IQ output, eliminating the need to physically halt the receiver for gain adjustments. This substitution of mechanical adjustment with digital processing maintains ADC dynamic range optimization while enabling continuous data collection.
2Manufacturing precision
If variable attenuation is switched in the Analog Domain to adjust signal level, then ADC input amplitude is optimized, but signal corruption occurs during the switching transition
Solution Approach 1:
The patent applies preliminary action by pre-calculating the gain alignment factor before the analog attenuation switching occurs. The digital signal processing system determines the required scaling factor in advance and applies it to the IQ output, ensuring that the digital domain is prepared to compensate for the upcoming analog gain change. This preliminary digital preparation prevents signal corruption that would otherwise occur during the analog switching transition.
3Manufacturing precision
If Analog Domain gain is adjusted manually or via ALC, then ADC operates at optimum level, but the reported gain alignment with received sample data is difficult due to variable propagation time
Solution Approach 1:
The patent implements feedback by continuously monitoring the actual propagation time through the digital filter stages and using this information to calculate the correct gain alignment factor. The system measures the time delay between the analog gain adjustment and its effect on the digital output, then uses this feedback to precisely align the gain compensation. This closed-loop feedback approach simplifies the alignment process compared to manual methods while maintaining accurate ADC operation.
Data Source
AI summary
A direct-digital receiver architecture is configured to make maximal use of the dynamic range of its analog to digital converter (ADC). The receiver includes an analog frontend that applies a variable gain factor to the analog input signal, a gain level unit that determines the variable gain factor by monitoring the digital signal that is output by the ADC, a gain scaling unit that determines a digital scale factor according to the determined gain factor, and a gain factor multiplier that multiplies the digital signal by the scale factor to produce a scaled digital signal, said multiplying being time aligned with the variable gain factor. The receiver further includes a digital signal processing train that is cognisant of the dynamic range of the ADC, variable gain factor and the digital scale factor for the time domain sample being processed.