ADC Gain Error Correction Using Gain-Adjusted LSB Accumulation

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Solution Overview

Problem

Existing ADC technologies face challenges in correcting gain errors without increasing the time, chip area, power consumption, and circuit complexity required for analog-to-digital conversion, particularly in delta-sigma and SAR architectures.

Innovation Solution

The solution involves storing a gain-adjusted LSB size in memory and applying it to the digital filter during each cycle of the ADC, allowing for gain-adjusted values to be added or subtracted based on the comparator's state, thereby generating a gain-corrected digital output without the need for complex digital multipliers or additional analog circuitry.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If digital multiplication by gain correction coefficient is used, then gain error correction accuracy is improved, but device complexity and power consumption increase

Engineering Contradiction:
Improvegain error correction accuracyVSAvoidcircuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent extracts the gain correction function from the main conversion path by using a separate digital filter that accumulates correction values based on comparator outputs. The gain correction is performed by adding or subtracting LSB-weighted values in the digital domain rather than using complex multiplication, thereby reducing circuit complexity while maintaining correction accuracy.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the correction parameter from a gain correction coefficient requiring multiplication to an LSB-weighted accumulation value that can be added or subtracted. By representing the correction as integer multiples of LSB values, the system avoids complex digital multiplication while achieving the same gain correction effect.

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If digital multiplication by gain correction coefficient is used, then gain error correction accuracy is improved, but conversion time increases

Engineering Contradiction:
Improvegain error correction accuracyVSAvoidconversion time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent implements continuous gain correction during the normal conversion process by accumulating correction values in the digital filter as the conversion proceeds. The correction is performed continuously alongside the main conversion operations rather than as a separate post-processing step, thereby maintaining conversion speed while achieving accurate gain correction.

Inventive Principle:
Principle #20Continuity of useful action

3Measurement precision

If analog gain correction techniques are used, then gain error correction is achieved, but die area and manufacturing cost increase

Engineering Contradiction:
Improvegain error correction capabilityVSAvoiddie area
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The patent substitutes analog correction mechanisms with digital correction methods. Instead of using analog circuits such as variable gain amplifiers or trimmed reference voltages that require additional die area and laser trimming, the system performs gain correction in the digital domain using simple adder/subtractor logic and accumulation, thereby reducing die area and eliminating costly manufacturing steps.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

4Measurement precision

If analog gain correction techniques are used, then gain error correction is achieved, but manufacturing precision requirements increase

Engineering Contradiction:
Improvegain error correction capabilityVSAvoidtrimming precision
Core Design Contradiction:
Measurement precisionVSManufacturing precision

Solution Approach 1:

The patent implements self-correction by using the ADC's own output and comparator to generate correction values. The system automatically detects gain errors through the comparator output and corrects them through digital accumulation, eliminating the need for external laser trimming or precision analog adjustment circuits that would require high manufacturing precision.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS20090073011A1Circuit and method for gain error correction in ADC
Publication Date: 2009.03.19 TEXAS INSTRUMENTS INC
  • US20090073011A1 patent drawing
  • US20090073011A1 patent drawing
  • US20090073011A1 patent drawing

AI summary

Gain errors are corrected in an ADC chip including an integrator (17), a comparator (30), and a digital filter (37) by storing a gain-adjusted LSB size based on measured gain error in a memory (44). The gain-adjusted LSB size is applied to the digital filter to cause gain-adjusted LSB size values to be added to or subtracted from accumulated content of the digital filter in accordance with a first or second state, respectively, of the comparator (30) during each cycle of the ADC. The final accumulated content after all required cycles of the ADC is a gain-corrected digital output signal (Dout(gain-corrected)).