Pipelined ADC Gain Error Estimation With Minimal Memory
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Solution Overview
Problem
Conventional gain error estimation modules in pipelined analog-to-digital converters require large amounts of memory space to store gain error estimates, increasing hardware costs and reducing the effective number of bits (ENOB) of digital conversion values due to gain errors caused by temperature changes and manufacturing variations.
Innovation Solution
A gain error estimation module that correlates correction numbers with digital output values to generate gain error estimates, which are then updated using a series of parameters to reduce memory requirements, allowing only previous gain error values and current estimates to be stored, thereby minimizing memory usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional gain error estimation modules store large amounts of gain error estimates, then measurement precision is improved, but device complexity increases due to large memory space requirements
Solution Approach 1:
The patent extracts only the essential components needed for gain error estimation by discarding the full set of gain error estimates. Instead of storing all N gain error estimates, the system extracts and stores only the current gain error estimate and the previous gain error estimate, which are the critical values needed for accurate estimation while minimizing memory usage.
Solution Approach 2:
The patent changes the parameter of memory storage from storing N gain error estimates to storing only 2 gain error estimates (current and previous). This parameter change in the amount of stored data maintains the essential functionality for gain error correction while dramatically reducing memory space requirements from O(N) to O(1).
2Measurement precision
If large memory space is allocated for storing gain error estimates, then measurement precision is improved, but manufacturing cost increases
Solution Approach 1:
The patent extracts only the necessary gain error estimates (current and previous values) from the full set of N estimates, storing only these essential values. This extraction approach maintains the precision needed for gain error correction while reducing the memory capacity required, thereby lowering manufacturing costs associated with large memory components.
Solution Approach 2:
The patent employs a simplified storage approach using minimal memory resources instead of expensive large-capacity memory. By using only current and previous gain error estimates, the system achieves accurate gain error correction with inexpensive, small-scale memory implementation, making the ADC more cost-effective to manufacture.
Data Source
AI summary
The invention provides a method for gain error estimation in an analog-to-digital converter. In one embodiment, the analog-to-digital converter comprises a plurality of stages. A series of correction numbers applied to a target stage selected from the stages are correlated with a series of calculation values calculated according to digital output values of the stages to generate a series of gain error estimates. The series of gain error estimates are multiplied by a series of updating parameters to obtain a series of first values. A series of previous gain error values are multiplied by one minus the corresponding updating parameters to obtain a series of second values, wherein the series of previous gain values are obtained by delaying the present gain error values. The series of first values and the series of second values are correspondingly added to obtain a series of present gain error values for gain error correction.