Sigma-Delta ADC Error Correction for ISI and Glitch Errors

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Solution Overview

Problem

Sigma-delta modulators suffer from signal degradation due to inter-symbol interference (ISI), leading to falling-edge, rising-edge, positive glitch, and negative glitch errors, which reduce the signal-to-noise ratio and introduce non-linearities that complicate noise filtering.

Innovation Solution

An error correction system utilizing a machine learning engine, such as a neural network, is implemented to modify the output bitstream and correct these errors by applying weights and biases to the bitstream signals, effectively compensating for the spectral components of ISI and quantization noise folding.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If sigma-delta modulators use non-return-to-zero coding scheme, then the device complexity is reduced, but inter-symbol interference occurs causing signal degradation

Engineering Contradiction:
Improvecoding scheme complexityVSAvoidsignal integrity
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

An error correction system acts as an intermediary between the sigma-delta modulator and the output, processing the digital signal to remove inter-symbol interference effects. The system includes error detection logic that identifies ISI-corrupted samples and replaces them with corrected values, thereby mediating the conflict between simple coding and signal integrity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The harmful inter-symbol interference effects are extracted and identified from the digital signal stream. The error correction system detects specific patterns indicative of ISI (such as consecutive identical symbols) and extracts these erroneous portions for correction, separating the harmful interference from the valid signal data.

Inventive Principle:
Principle #2Taking out (Extraction)

2Device complexity

If inter-symbol interference is present, then the ADC structure remains simple, but falling-edge and rising-edge errors increase

Engineering Contradiction:
ImproveADC structureVSAvoidedge transition accuracy
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The error correction system implements feedback by monitoring the digital signal for ISI patterns and continuously correcting edge transition errors. The system feeds back correction decisions based on detected error patterns, adjusting the output to compensate for falling-edge and rising-edge inaccuracies caused by inter-symbol interference.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The error correction system performs preliminary detection and correction of edge transition errors before the signal is finalized. By identifying potential ISI-related edge errors in advance and applying corrections proactively, the system prevents these errors from propagating through the signal chain.

Inventive Principle:
Principle #10Preliminary action

3Device complexity

If inter-symbol interference occurs, then the quantization process remains straightforward, but positive and negative glitch errors are introduced

Engineering Contradiction:
Improvequantization processVSAvoidsymbol value accuracy
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The error correction system serves as an intermediary between the straightforward quantization process and the final output, detecting and correcting glitch errors without complicating the quantization itself. It monitors for patterns indicative of positive and negative glitches and applies corrections to restore accurate symbol values.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system converts the harmful effect of inter-symbol interference into a detectable pattern. By recognizing specific error patterns caused by ISI and glitches, the system can systematically identify and correct these errors, turning the previously harmful interference into a known quantity that can be compensated for.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

4Productivity

If sigma-delta modulators operate with identical consecutive symbols, then the processing is simplified, but glitch errors increase

Engineering Contradiction:
Improveprocessing efficiencyVSAvoidsymbol accuracy
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The error correction system applies partial correction only where needed - specifically targeting sequences of identical consecutive symbols that are prone to glitch errors. Rather than processing every symbol through complex correction logic, it applies correction selectively to problematic regions, maintaining efficiency while improving accuracy.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The system performs preliminary identification of consecutive identical symbol sequences that are susceptible to glitch errors. By detecting these patterns in advance and applying corrections proactively, it prevents accuracy degradation while maintaining efficient processing of the overall signal stream.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentEP4489313A1Inter-symbol interference compensation for analog-to-digital converter
Publication Date: 2025.01.08 NXP BV
  • EP4489313A1 patent drawingFigure 1
  • EP4489313A1 patent drawingFigure 2~3
  • EP4489313A1 patent drawingFigure 4~5

AI summary

A device may include a sigma-delta analog-to-digital converter (ADC) configured to convert an analog input signal to a digital signal that is a digital approximation of the analog input signal. A bitstream modifier is configured to receive the digital signal, output a first signal that is based on the digital signal at a first output terminal and output a first difference signal at a second output terminal that includes a first difference value between a first value of the digital signal and a second value of the digital signal. The second value is immediately prior to the first value in the digital signal. An error correction system is configured to receive the first signal, receive the first difference signal, use the first signal and the first difference signal to determine a correction value, and modify the digital signal to generate a corrected digital signal by applying the correction value.