Programmable-Gain ADC Input Circuit for High Common-Mode Impedance

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Solution Overview

Problem

Existing discrete-time input circuits for ADCs require buffering and external common-mode references to handle large common-mode voltage differences, leading to high power consumption and reduced impedance, which complicates signal measurement and noise preservation.

Innovation Solution

A delta-sigma ADC circuit design where a reference feedback capacitor is charged to match the common-mode voltage during one clock phase and coupled to the integrator's summing node in the next phase, minimizing common-mode charge and allowing high input impedance without external buffering, using a switching circuit and additional gain-setting sampling capacitors for programmable gain adjustments.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If a buffer circuit is used to handle large common-mode voltage differences, then the input impedance is maintained, but power consumption increases significantly

Engineering Contradiction:

Improvepower consumptionVSAvoidinput impedance

Core Design Contradiction:

Use of energy by moving objectVSEase of operation

Solution Approach 1:

The patent extracts the common-mode voltage handling function from the signal path by using a dedicated common-mode feedback circuit that senses and cancels common-mode voltages separately. This allows the main buffer to focus only on differential signal buffering, significantly reducing power consumption while maintaining high input impedance for the differential input.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The buffering function is segmented into two independent paths: a differential signal path that maintains high input impedance with low power consumption, and a common-mode feedback path that handles large common-mode voltage differences. This segmentation allows each path to be optimized independently, resolving the contradiction between power consumption and input impedance.

Inventive Principle:

Principle #1Segmentation

2Object-affected harmful factors

If the input sampling capacitor is made large to reduce thermal noise, then noise performance improves, but the input circuit impedance decreases

Engineering Contradiction:

Improvethermal noiseVSAvoidinput impedance

Core Design Contradiction:

Object-affected harmful factorsVSEase of operation

Solution Approach 1:

The patent resolves this contradiction by transitioning from a single-capacitor approach to a two-dimensional capacitor structure: a large input sampling capacitor connected to the differential input nodes for noise reduction, and a separate common-mode feedback capacitor that handles the common-mode voltage component. This dimensional separation allows the large capacitor to reduce noise while the common-mode feedback mechanism maintains high input impedance.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

3Device complexity

If external common-mode voltage references are used to simplify buffer requirements, then circuit design becomes easier, but device complexity and power consumption increase

Engineering Contradiction:

Improvecircuit structureVSAvoidpower consumption

Core Design Contradiction:

Device complexityVSUse of energy by moving object

Solution Approach 1:

The patent implements a self-service common-mode feedback mechanism where the circuit automatically senses its own common-mode voltage through dedicated sensing nodes and generates the necessary feedback signal internally. This eliminates the need for external common-mode voltage references while maintaining simplified buffer requirements, reducing both device complexity and power consumption compared to external reference solutions.

Inventive Principle:

Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces power consumption and maintains high input impedance by minimizing signal-dependent charge transfer, allowing for efficient noise preservation and universal applicability across varying voltage ranges without the need for external common-mode references.

Implementation Method 1

the reference feedback capacitor is charged to the input voltage with respect to a common-mode voltage source

Methodology Applied

Scientific EffectCapacitance: Capacitance

Data Source

PatentUS7489263B1Discrete-time programmable-gain analog-to-digital converter (ADC) input circuit with multi-phase reference application

Publication Date: 2009.02.10 CIRRUS LOGIC INC

AI summary

A discrete-time programmable-gain analog-to-digital converter (ADC) input circuit with multi-phase reference application, provides a high input impedance level substantially independent of input capacitor size and input signal gain setting. An input voltage is sampled at the common mode voltage of the input, using one or more reference capacitor(s) that has been charged in a previous clock phase to the reference feedback voltage. The sampled input voltage is then applied in series with a quantizer-controlled reference voltage to the input of an integrator in a second clock phase. The summing mode of the integrator is maintained at the reference common-mode voltage. Since the charge pulled from the input voltage source is substantially determined only by the quantization error and input noise voltage, the circuit has a high signal input impedance. Since the input voltage source is sampled with respect to its common-mode voltage, the common-mode input impedance is also high.