Switched-Capacitor Integrator for ADC Offset Cancellation
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Solution Overview
Problem
Conventional analog-to-digital converters face challenges in achieving high accuracy and efficiency due to offset voltage issues in operational amplifiers, which affect conversion efficiency and accuracy, especially when dealing with high-accuracy conversions.
Innovation Solution
An integrator with operational amplifiers, offset capacitors, and controllable switches is used to store and counteract offset voltages in different operation phases, allowing for improved conversion efficiency and accuracy by eliminating offset voltages through controlled switching of capacitors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional ∑-Δ ADC is used to achieve high conversion accuracy, then conversion accuracy is improved, but conversion speed deteriorates
Solution Approach 1:
The patent segments the ADC conversion process into two distinct parts: a ∑-Δ ADC for high-order conversion and a SAR ADC for low-order conversion. This segmentation allows each converter to operate in its optimal performance range, with the ∑-Δ ADC handling the majority of conversion cycles efficiently and the SAR ADC providing final high-precision refinement, thus resolving the contradiction between conversion speed and accuracy.
Solution Approach 2:
The patent implements dynamic switching between different conversion modes and operational amplifier configurations. The system dynamically adjusts the number of conversion cycles, switches between ∑-Δ and SAR conversion modes, and dynamically reconfigures the operational amplifier circuitry (including switching offset capacitors in/out) based on real-time conversion requirements, enabling optimal performance across varying accuracy and speed demands.
2Productivity
If conventional SAR ADC is used to achieve high conversion efficiency, then conversion efficiency is improved, but conversion accuracy deteriorates
Solution Approach 1:
The patent segments the conversion process so that the SAR ADC handles only the final low-order conversion stages rather than the entire conversion process. This segmentation allows the SAR ADC to operate efficiently at high speed for the final refinement bits while the ∑-Δ ADC performs the bulk of the conversion work, thereby maintaining both high conversion efficiency and high conversion accuracy.
Solution Approach 2:
The patent dynamically adjusts the conversion process by switching between different operational modes and adapting the number of conversion cycles based on the required accuracy. The system can dynamically engage the SAR ADC for final refinement only when needed, rather than continuously, thus maintaining high efficiency while achieving high accuracy when required.
3Device complexity
If offset voltage of operational amplifier is not eliminated, then device complexity is reduced, but conversion accuracy deteriorates
Solution Approach 1:
The patent applies preliminary action by implementing offset calibration before the main conversion process. The offset capacitors are pre-charged to compensate for operational amplifier offset voltages during a calibration phase, and this preliminary offset elimination is performed dynamically before conversion to ensure high accuracy without adding significant complexity to the main conversion circuitry.
Solution Approach 2:
The patent uses dynamic switching of offset capacitors that are connected to the operational amplifier inputs only when needed for offset compensation. This dynamic approach allows the system to eliminate offset voltages on-demand during calibration or specific conversion phases without requiring permanently complex offset compensation circuitry, thus achieving high accuracy while minimizing overall device complexity.
4Measurement precision
If offset voltage compensation is implemented, then conversion accuracy is improved, but device complexity increases
Solution Approach 1:
The patent merges the offset compensation function with the existing operational amplifier and capacitor structure of the ADC. Rather than adding separate complex offset compensation circuits, the offset capacitors are integrated into the existing signal path and controlled through the same switch matrix, allowing offset elimination to be achieved by utilizing and coordinating existing components for dual purposes.
Solution Approach 2:
The patent implements dynamic control of offset capacitors through the existing switch matrix, allowing offset compensation to be activated or deactivated based on conversion phase requirements. This dynamic approach enables accurate offset elimination only when needed, avoiding the need for permanently active complex compensation circuitry, thus improving accuracy while minimizing overall device complexity.
Data Source
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AI summary
An integrator and an analog-to-digital converter are provided. The analog-to-digital converter includes the integrator, a comparison circuit and a control logic circuit. The integrator includes an operational amplifier, offset capacitors, input capacitors, integral capacitors and controllable switches. The input capacitors and the integral capacitors are connected to the operational amplifier via controllable switches, so that the integrator operates in various operation modes. Operation states of the offset capacitors in a first phase and a second phase of an operation cycle are controlled by switching on or off the controllable switches. Therefore, an offset voltage of the integrator is eliminated, and conversion efficiency and conversion accuracy of the analog-to-digital converter is improved.