ADC Linearity Testing Using Nonlinearity Error Modeling
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Solution Overview
Problem
Current methods for testing high-resolution analog-to-digital converters (ADCs) are time-consuming and costly, requiring extensive measurements to ensure linearity, which prolongs engineering time and increases production costs.
Innovation Solution
A system and methodology that includes a signal generator, analog-to-digital converter circuitry, an expected signal generator module, an error signal module, and a nonlinearity modeling module to efficiently test ADC linearity by generating and comparing output codes, modeling nonlinearity errors, and adapting the model to minimize errors, thereby reducing test time and cost.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If complete testing of all codes of a high-resolution ADC is performed using state of the art methods, then measurement precision and reliability are improved, but test time and cost increase significantly
Solution Approach 1:
The patent segments the complete ADC code range into multiple subsets or groups. Instead of measuring all 2^16 codes sequentially, the testing methodology divides the code space into smaller segments that can be tested independently and in parallel, significantly reducing the total test time while maintaining measurement precision through systematic coverage of all segments.
Solution Approach 2:
The patent performs preliminary characterization of the ADC to identify and exclude codes that are guaranteed to meet specifications based on earlier measurements or theoretical bounds. This preliminary action allows the testing process to focus resources on critical regions of the code space, reducing overall test time without sacrificing measurement precision for codes that require full verification.
2Measurement precision
If complete testing of all codes of a high-resolution ADC is performed using state of the art methods, then measurement precision and reliability are improved, but manufacturing cost increases
Solution Approach 1:
The patent segments the complete ADC code range into multiple subsets or groups. Instead of measuring all 2^16 codes sequentially, the testing methodology divides the code space into smaller segments that can be tested independently and in parallel, significantly reducing the total test time while maintaining measurement precision through systematic coverage of all segments.
Solution Approach 2:
The patent changes the testing parameters dynamically based on the ADC performance characteristics. By adjusting measurement resolution, number of samples, and test conditions according to the specific code region being tested, the methodology achieves required precision at lower cost for codes that don't require maximum measurement effort, while allocating full resources only where necessary.
3Measurement precision
If higher resolution ADCs are tested using state of the art methods, then measurement precision is improved, but test time increases exponentially
Solution Approach 1:
The patent segments the complete ADC code range into multiple subsets or groups. Instead of measuring all 2^16 codes sequentially, the testing methodology divides the code space into smaller segments that can be tested independently and in parallel, significantly reducing the total test time while maintaining measurement precision through systematic coverage of all segments.
Solution Approach 2:
The patent applies partial testing strategies where not all codes require the same level of measurement effort. By performing excessive measurements on critical codes and partial or reduced measurements on non-critical codes, the methodology achieves sufficient precision for high-resolution ADCs while maintaining high testing throughput through selective measurement depth.
Data Source
AI summary
A method for testing an analog-to-digital converter is disclosed. In an implementation, the method may include providing input data to analog-to-digital converter circuitry. The analog-to-digital converter circuitry generates an output code based upon the input data. The method includes generating expected output code based upon the corresponding input data and generating an output code error signal based upon the difference of the output code and the expected output code. A predicted code error signal is modeled based upon corresponding code. The method also includes generating a noise error signal representing a difference between the output code error signal and the predicted code error.


