Time-Interleaved ADC Calibration Using LMS Mismatch Correction

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Time-interleaved analog-to-digital converters (ADCs) face mismatches in sub-ADCs due to manufacturing variances, affecting the effective-number-of-bits (ENOB) and requiring calibration to align gain and offset errors.

Innovation Solution

A calibration device comprising an error estimating module with a filter and least-mean-square module to generate estimated errors, and an error correction module to calibrate the ADCs, using accumulating and averaging, and least-mean-square algorithms to align gain and offset errors among sub-ADCs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If time-interleaved sub-ADCs are used to increase conversion speed, then productivity is improved, but manufacturing precision deteriorates due to mismatches among sub-ADCs

Engineering Contradiction:

Improveconversion speedVSAvoidmismatch among sub-ADCs

Core Design Contradiction:

ProductivityVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by performing calibration before normal operation. The calibration module estimates gain and offset errors of sub-ADCs using least-mean-square algorithms, then corrects these errors prior to actual signal conversion, ensuring high precision is achieved before productivity demands are met

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback through the calibration module that continuously monitors and corrects mismatches among sub-ADCs. The least-mean-square estimation process uses feedback from actual converter outputs to adjust and minimize errors, maintaining manufacturing precision while enabling high-speed time-interleaved operation

Inventive Principle:

Principle #23Feedback

2Measurement precision

If calibration is performed to improve manufacturing precision, then measurement precision is improved, but device complexity increases due to additional calibration modules

Engineering Contradiction:

ImproveENOBVSAvoidcalibration module structure

Core Design Contradiction:

Measurement precisionVSDevice complexity

Solution Approach 1:

The calibration module is designed with multi-functionality, serving both as an error estimation unit and an error correction unit. By integrating gain and offset calibration functions into a single modular structure that operates on all sub-ADCs uniformly, the patent reduces overall device complexity while achieving high measurement precision

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The calibration module performs self-service by automatically estimating and correcting its own errors using the least-mean-square algorithm. The system uses its own output signals to generate calibration data, eliminating the need for external calibration equipment and reducing overall system complexity while improving ENOB

Inventive Principle:

Principle #25Self-service

Data Source

PatentUS7482956B2Calibration apparatus for mismatches of time-interleaved analog-to-digital converter

Publication Date: 2009.01.27 REALTEK SEMICON CORP

AI summary

A calibration device for calibrating an ADC comprising: an error estimator for estimating an error of a digital signal outputted from the ADC, the error estimator includes: a digital filter for filtering the digital signal to generate a filtered signal; and a least-mean-square module for performing a least-mean-square operation according to the filtered signal to generate an estimated error; and an error correction module for correcting the digital signal according to the estimated error.