ADC Low-Power Control Using Partial Capacitor Charging
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Solution Overview
Problem
Analog to digital converters (ADCs) in automotive applications face challenges in power savings, as they must remain powered to determine when to exit low power modes, leading to potential battery drain due to unpredictable usage intervals and the need for high precision during mode transitions.
Innovation Solution
A processing unit with a power savings mode that switches between low power and check modes, where the ADC provides a less precise output quickly by preventing capacitor charging during the check mode, allowing faster determination of mode transitions and reducing power consumption by minimizing capacitor charging time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the ADC operates in high precision mode during check mode to ensure accurate mode transition determination, then measurement precision is improved, but power consumption increases and transition time increases due to capacitor charging requirements
Solution Approach 1:
The patent applies dynamics by making the ADC operational characteristics changeable based on the mode. During check mode, the ADC operates with reduced precision (capacitor not fully charged) to save power, while during active mode it operates at full precision. This dynamic adjustment of operational state resolves the contradiction between precision and power consumption.
Solution Approach 2:
The patent uses partial action by providing only sufficient precision during check mode rather than full precision. The capacitor is charged partially to provide adequate but not excessive precision for mode determination, reducing power consumption while maintaining functional adequacy.
2Measurement precision
If the ADC charges the capacitor during check mode to reduce noise and improve precision, then measurement precision is improved, but the time required for mode transition determination increases
Solution Approach 1:
The patent makes the charging process dynamic by allowing the capacitor to charge partially during check mode rather than requiring full charging. This dynamic approach reduces the time spent in check mode while providing sufficient precision for mode determination.
Solution Approach 2:
The patent applies partial action by charging the capacitor only to the extent necessary for adequate precision during check mode, not to full capacity. This partial charging reduces the time required while maintaining sufficient measurement capability.
3Reliability
If the processor remains powered to detect when to exit power savings mode, then the ability to detect mode transition timing is improved, but power consumption increases due to battery drain
Solution Approach 1:
The patent applies self-service by enabling the processor to detect mode transition needs using minimal power from the ADC in check mode, rather than requiring full processor power. The system serves its own detection function with reduced power consumption.
Solution Approach 2:
The patent uses partial action by providing just enough ADC operation during check mode to enable mode transition detection, without full processor power. This partial operation maintains detection capability while minimizing battery drain.
Data Source
AI summary
A circuit comprises a reference voltage generating circuit, a first switch, a second switch, and a capacitive element. The reference voltage generating circuit has an input and output terminal for providing a reference voltage. The first switch has a first terminal coupled to a first power supply voltage terminal, a second terminal coupled to the input terminal of the reference voltage generating circuit, and a control terminal for receiving a first control signal. The second switch has a first terminal coupled to the output terminal of the reference voltage generating circuit, a second terminal, and a control terminal for receiving a second control signal. The capacitive element has a first plate electrode coupled to the second terminal of the second switch, and a second plate electrode coupled to a second power supply voltage terminal.