ADC Mismatch-Shaping Encoder for Stable Conversion Accuracy
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Solution Overview
Problem
Analog-to-digital converter systems are sensitive to weighting factor mismatch, which degrades accuracy over time due to manufacturing variability and environmental changes, requiring frequent recalibration that is impractical for continuous operation.
Innovation Solution
The introduction of a mismatch-shaping encoder and dither generator in the analog-to-digital converter system, which applies a digital dither code and scrambles bit values to reduce the impact of weighting factor mismatch, thereby improving accuracy and reducing the need for frequent recalibration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional ADC architectures are used, then the system is simpler to implement, but the accuracy degrades over time due to weighting factor mismatch from manufacturing variability and environmental changes
Solution Approach 1:
The patent applies preliminary calibration to measure and store weighting factors before actual conversion operations. The calibration phase characterizes the ADC's actual weighting factors, which are then used to compensate for mismatches during normal operation, preventing accuracy degradation without requiring frequent recalibration.
Solution Approach 2:
The patent implements a feedback mechanism where the measured weighting factors from calibration are stored and applied during conversion operations. The system continuously uses this stored information to correct for manufacturing variability and environmental changes, maintaining accuracy over time without external intervention.
2Measurement precision
If frequent recalibration is performed to maintain accuracy, then measurement precision is improved, but productivity decreases due to operation interruptions
Solution Approach 1:
The patent performs calibration once before normal operation and stores the weighting factors for extended use. This preliminary characterization eliminates the need for frequent recalibration, allowing continuous operation without interruptions while maintaining accuracy through the stored calibration data.
Solution Approach 2:
The system uses its own stored calibration data to continuously correct for weighting factor mismatches during operation. By serving its own calibration needs from stored information rather than requiring external recalibration events, the system maintains accuracy while enabling continuous uninterrupted operation.
3Measurement precision
If manufacturing precision is improved to reduce weighting factor mismatch, then measurement precision is improved, but manufacturing cost and complexity increase
Solution Approach 1:
Instead of relying solely on high manufacturing precision, the patent measures the actual weighting factors produced during manufacturing and uses this feedback information to correct for mismatches. This approach accepts manufacturing variability but compensates for it through calibration and digital correction, achieving high accuracy without requiring expensive high-precision manufacturing processes.
Solution Approach 2:
The patent transforms the physical weighting factor parameters into measurable and correctable digital values through calibration. By converting the analog weighting factor mismatch problem into a digital correction problem, the system can compensate for manufacturing variations through software/algorithms rather than requiring stricter manufacturing controls.
Data Source
AI summary
An analog-to-digital converter (ADC) system and method. The ADC system in accord with one embodiment includes a sampling digital-to-analog converter configured to sample a combination of an analog signal value and an analog dither value, and a control circuit comprising a mismatch-shaping encoder. The control circuit is configured to sequentially apply a plurality of digital codes to the sampling digital-to-analog converter during an analog-to-digital conversion operation to derive a digital code representing the combination of the analog signal value and the analog dither value. Several embodiments are presented.