CDAC-Based ADC Multi-Sampling for Faster Image Sensor Readout
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Solution Overview
Problem
Performing correlated multi-sampling in the digital domain for image sensors reduces frame rate due to the need for additional ADC conversions, which is undesirable.
Innovation Solution
Integrate correlated multi-sampling circuitry with capacitive digital-to-analog converter circuitry in the analog-to-digital converter, utilizing charge sharing to reduce the need for separate ADC conversions for each sample, thereby maintaining high frame rate and minimizing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If correlated multi-sampling is performed in the digital domain with separate ADC conversions for each sample, then noise artifacts are mitigated, but frame rate is reduced
Solution Approach 1:
The patent combines multiple sampling operations and ADC conversions into a single integrated process. Multiple samples are taken and averaged through a shared ADC circuit rather than performing separate conversions for each sample, thereby maintaining noise mitigation benefits while improving frame rate.
Solution Approach 2:
The ADC circuit is designed to perform multiple functions: it can conduct correlated multi-sampling operations, perform averaging of multiple samples, and support both single-sample and multi-sample conversion modes. This multi-functionality allows the system to maintain high frame rate while achieving noise reduction.
2Measurement precision
If multiple separate ADC conversions are performed for correlated multi-sampling, then noise artifacts are reduced, but power consumption increases
Solution Approach 1:
The patent merges multiple ADC conversion operations into a single shared conversion process. By using one ADC circuit to handle multiple samples through correlated multi-sampling and digital averaging, the system reduces the total power consumption compared to running multiple separate ADC conversions, while still achieving noise artifact reduction.
3Measurement precision
If multiple separate ADC conversions are performed for each sample, then correlated multi-sampling is achieved, but readout time increases
Solution Approach 1:
The patent performs preliminary sampling of multiple signals before conducting the ADC conversion. By capturing multiple samples in advance and preparing them for averaging, the system reduces the critical path delay during the actual conversion process, thereby shortening readout time while maintaining correlated multi-sampling capabilities.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The integrated correlated multi-sampling circuitry reduces readout time, improves frame rate, and decreases power consumption while mitigating noise artifacts in image sensors.
Implementation Method 1
utilizing charge sharing to reduce the need for separate ADC conversions for each sample
Data Source
AI summary
A system may include an analog-to-digital converter (ADC) that contains a capacitive digital-to-analog converter (CDAC). An input signal for the ADC may be sampled at different times using multi-sampling circuitry. The multi-sampling circuitry may include sampling capacitors that form at least part of the CDAC.