ADC Noise Cancellation With Smaller Sampling Capacitors
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Solution Overview
Problem
Conventional analog-to-digital converter (ADC) architectures face challenges in reducing kT/C sampling noise, noise coupling, and amplifier thermal noise, which limits the use of larger sampling capacitors due to driving difficulties and significant die area occupation.
Innovation Solution
The proposed solution involves various techniques that significantly reduce noise sources in ADC circuits, allowing for smaller sampling capacitors while maintaining improved noise performance and power efficiency. These techniques include canceling or reducing kT/C sampling noise, noise coupling, and amplifier thermal noise, enabling smaller capacitors and reduced die area and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If larger sampling capacitors are used to reduce kT/C sampling noise, then noise performance is improved, but die area occupation increases significantly
Solution Approach 1:
The patent applies correlated double sampling to convert the harmful kT/C sampling noise into a measurable and cancelable component. By taking two samples (one with the signal plus noise, one with noise only) and subtracting them, the noise that would normally require large capacitors to suppress is instead actively canceled through correlation processing, achieving low noise with small capacitors
Solution Approach 2:
The patent introduces an intermediary correlation processing stage between the sampling capacitors and the final digital output. This intermediary process computes the correlation between two samples and uses it to eliminate noise components, allowing small capacitors to achieve the noise performance that would otherwise require large capacitors
2Measurement precision
If larger sampling capacitors are used to reduce kT/C sampling noise, then noise performance is improved, but driving difficulty increases
Solution Approach 1:
The patent transforms the noise problem into a solvable correlation problem. Instead of trying to drive large capacitors to suppress noise, the system uses small capacitors and relies on correlation processing to identify and eliminate noise, making the driving task much easier while maintaining noise performance
Solution Approach 2:
The patent changes the approach from passive noise suppression through capacitor sizing to active noise cancellation through correlation processing. By changing the fundamental parameter from capacitor size to correlation computation, the system achieves noise reduction without the driving difficulties associated with large capacitors
3Measurement precision
If conventional ADC architectures are used, then kT/C sampling noise can be reduced with larger capacitors, but power consumption increases
Solution Approach 1:
The patent converts the power-consuming approach of using large capacitors into a computationally-efficient correlation process. The correlated double sampling algorithm processes two samples and subtracts their correlation, actively canceling noise without requiring the continuous power consumption needed to drive large capacitor arrays
Solution Approach 2:
The patent replaces expensive, power-hungry large capacitors with cheap, low-power small capacitors. The noise suppression function is transferred from the physical capacitor size to a computational correlation process that consumes significantly less power, achieving the same noise performance with much lower energy usage
Data Source
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AI summary
Noise sources in an ADC circuit can include kT/C noise of a sampling capacitor, noise coupling on to sampling capacitors from digital circuits, and amplifier noise. Also, charge injection from mismatch in sample switches can cause offsets. These various noise sources can be largely canceled or reduced using described techniques. As a result, the size of the sampling capacitors can be greatly reduced, while still achieving significantly improved noise performance and power efficiency for the overall converter.