ADC Integral Nonlinearity Mapping for Efficient Trim Correction
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Solution Overview
Problem
Existing analog-to-digital converter (ADC) technologies face challenges in accurately identifying and correcting integral non-linearity errors due to component mismatches, particularly in multi-stage designs where errors are recursively nested and difficult to decouple, leading to complex and impractical brute-force correction methods.
Innovation Solution
A method involving differential response extraction, filtering, and amplitude imposition to digitally represent integral non-linearity, allowing for reliable identification and correction of significant departures in ADC responses, reducing the complexity of trim algorithms by focusing on gap locations and magnitudes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If brute-force correction methods are used to address component mismatches in multi-stage ADC designs, then correction accuracy may be improved, but computational complexity and processing time increase significantly
Solution Approach 1:
The patent extracts and focuses only on the significant departure locations (gap locations) from the complete INL response data. By identifying and isolating only the critical error points rather than processing all data points, the method reduces computational complexity while maintaining correction accuracy for the most impactful errors.
Solution Approach 2:
The patent segments the INL error response into discrete gap locations and magnitudes at specific code transitions. This segmentation transforms the continuous correction problem into discrete, manageable segments that can be corrected independently, reducing overall computational burden.
2Reliability
If complete INL response data is processed to identify all error points, then comprehensive error correction is achieved, but the number of parameters to be addressed becomes unmanageably large
Solution Approach 1:
The patent extracts only the significant departure locations from the complete INL response, filtering out minor variations. This extraction process reduces the parameter set from millions of data points to a manageable number of critical gap locations and magnitudes that require correction.
Solution Approach 2:
The patent applies partial action by focusing correction efforts only on the most significant error gaps rather than attempting to correct every minor deviation. This selective approach achieves sufficient reliability for practical applications while keeping the number of parameters manageable.
3Manufacturing precision
If traditional trimming methods are used to correct component mismatches, then analog signal translation linearity is improved, but the trimming process becomes complex and time-consuming
Solution Approach 1:
The patent replaces traditional analog trimming mechanisms (such as laser cutting resistors or switching parasitic capacitors) with a digital representation and correction approach. By digitally representing the INL response and identifying gap locations, the method enables faster correction planning and execution while achieving the same linearity improvement.
Solution Approach 2:
The patent performs preliminary identification and characterization of gap locations and magnitudes before the actual trimming process. This preliminary digital analysis prepares a correction roadmap that guides the physical trimming process, making it more efficient and reducing the time required for iterative adjustments.
Data Source
AI summary
A method digitally representing an integral non-linearity response for a device includes: (a) In no particular order: (1) Identifying locations of significant departures of the integral response, including: [a] Extracting first and second differential responses from the integral response in first and second device trim states. [b] Twice-filtering first and second differential responses to produce first and second filtered responses. [c] Determining difference between first and second filtered responses to produce a treated response. [d] Identifying a locus for each maximum of the treated response in a highest excursion range and in at least one lower excursion range. [e] Imposing zero amplitude on the treated response within a code range of each locus. Locations are centered within each code range. (2) Determining magnitude for each significant departure. (b) Collecting each location in association with each magnitude for each significant departure to establish an array of location-magnitude pairs effecting the representing.