ADC Comparator Offset Tracking Using Selective PRBS Calibration

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Solution Overview

Problem

Existing analog-to-digital converter (ADC) topologies fail to adequately account for comparator flicker noise, which varies over time and degrades accuracy, and chopper circuitry operations introduce additional noise, increasing comparator input offset.

Innovation Solution

An ADC system with calibration circuitry that selectively estimates and corrects comparator input offset errors by applying pseudorandom binary sequence (PRBS) values to determine offset errors and provide calibration signals when necessary, reducing noise degradation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If chopper circuitry is used to reduce comparator flicker noise, then linearity error is reduced, but overall noise increases and comparator input offset increases

Engineering Contradiction:
Improvelinearity errorVSAvoidoverall noise
Core Design Contradiction:
Measurement precisionVSObject-generated harmful factors

Solution Approach 1:

The calibration circuitry performs preliminary estimation of comparator input offset errors using PRBS values before the actual ADC conversion. By pre-characterizing the offset errors and storing correction values, the system prepares compensation data in advance, allowing the main ADC operation to proceed without adding dither noise while still achieving accurate linearity correction.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The calibration circuitry acts as an intermediary between the comparators and the digitization circuitry. It measures the offset errors using PRBS sequences and provides correction signals that compensate for these errors, thereby eliminating the need for continuous dither noise injection and reducing the overall noise in the system.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If calibration is performed continuously to correct comparator offset errors, then ADC accuracy is improved, but device complexity and power consumption increase

Engineering Contradiction:
ImproveADC accuracyVSAvoidcalibration circuitry complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

Instead of continuous calibration, the system performs calibration periodically using PRBS sequences at specific intervals or under specific conditions. This periodic calibration approach maintains ADC accuracy while significantly reducing the complexity and power consumption associated with continuous calibration operations.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The calibration circuitry changes the input signal parameters by applying known PRBS sequences during calibration modes. By switching between normal operation mode and calibration mode with distinct parameter sets, the system achieves accurate offset error measurement without requiring complex continuous adjustment mechanisms.

Inventive Principle:
Principle #35Parameter changes

3Stability of the object's composition

If dither noise is added to reduce flicker noise effects, then transfer function linearity is improved, but signal-to-noise ratio deteriorates

Engineering Contradiction:
Improvetransfer function linearityVSAvoidsignal-to-noise ratio
Core Design Contradiction:
Stability of the object's compositionVSObject-generated harmful factors

Solution Approach 1:

The system pre-measures comparator offset errors using PRBS sequences and stores correction values before actual signal conversion. This preliminary characterization allows the ADC to operate without adding dither noise during normal conversion, maintaining both linearity and signal-to-noise ratio.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The calibration circuitry provides feedback correction signals based on PRBS-based offset error measurements. This feedback mechanism compensates for comparator offset errors and flicker noise effects without requiring continuous dither noise injection, thereby maintaining transfer function linearity while preserving signal-to-noise ratio.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS12494794B2Analog-to-digital converter (ADC) having selective comparator offset error tracking and related corrections
Publication Date: 2025.12.09 TEXAS INSTRUMENTS INC
  • US12494794B2 patent drawing
  • US12494794B2 patent drawing
  • US12494794B2 patent drawing

AI summary

An analog-to-digital converter (ADC) includes: a set of comparators configured to provide comparison results based on an analog signal and respective reference thresholds for comparators of the set of comparators; digitization circuitry configured to provide a digital output code based on the comparison results and a mapping; and calibration circuitry. The calibration circuitry is configured to: receive the comparison results; determine if the analog signal is proximate to one of the respective reference thresholds based on the comparison results; in response to determining the analog signal is proximate to one of the respective reference thresholds, receive ADC values based on different pseudorandom binary sequence (PRBS) values being applied to the analog signal; determine an offset error based on the ADC values; and provide a comparator input offset calibration signal at a calibration circuitry output if the estimated offset error is greater than an offset error threshold.