ADC Comparator Offset Tracking for Low-Noise Accuracy Correction
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Solution Overview
Problem
Existing analog-to-digital converter (ADC) topologies fail to adequately account for comparator flicker noise, leading to lower accuracy due to varying comparator input offsets over time, and chopper circuitry operations increase overall noise while reducing linearity error.
Innovation Solution
An ADC system with selective comparator offset error tracking and correction, utilizing calibration circuitry to estimate and correct comparator input offsets based on pseudorandom binary sequence values, reducing offset errors by adjusting comparator parameters when necessary.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If chopper circuitry is used to reduce linearity error from comparator flicker noise, then linearity error is reduced, but overall noise increases
Solution Approach 1:
The patent segments the noise correction approach by treating different noise sources differently: chopper circuitry handles flicker noise while a separate calibration process handles offset errors. This segmentation allows selective correction without uniformly adding noise across all error sources.
Solution Approach 2:
The patent applies local quality by making the offset error correction selective rather than universal. The calibration circuitry determines whether correction is needed based on detected offset errors, applying correction only where and when necessary, rather than uniformly across all comparators and all times.
2Measurement precision
If calibration circuitry is added to correct comparator offsets, then ADC accuracy is improved, but device complexity increases
Solution Approach 1:
The patent implements preliminary action by performing calibration measurements during idle periods or between conversions. The calibration circuitry proactively detects offset errors and applies corrections before they affect normal ADC operation, rather than reacting to errors after they occur.
Solution Approach 2:
The calibration circuitry uses the ADC's own comparator outputs and internal resources to perform self-calibration. By utilizing existing circuitry for calibration purposes, the patent reduces the need for entirely separate calibration hardware, thereby limiting the increase in device complexity.
3Measurement precision
If offset error correction is applied continuously, then ADC accuracy is maintained, but power consumption increases
Solution Approach 1:
The patent implements periodic action by performing offset error calibration at specific intervals or under specific conditions rather than continuously. The calibration circuitry monitors comparator outputs and initiates correction only when offset errors are detected or at predetermined calibration intervals, reducing power consumption compared to continuous correction.
Solution Approach 2:
The patent applies partial action by correcting only the specific offset errors that exceed a threshold or are detected during calibration, rather than continuously correcting all possible error sources. This selective correction approach maintains accuracy where needed while minimizing unnecessary power consumption.
Data Source
AI summary
An analog-to-digital converter (ADC) includes: a set of comparators configured to provide comparison results based on an analog signal and respective reference thresholds for comparators of the set of comparators; digitization circuitry configured to provide a digital output code based on the comparison results and a mapping; and calibration circuitry. The calibration circuitry is configured to: receive the comparison results; determine if the analog signal is proximate to one of the respective reference thresholds based on the comparison results; in response to determining the analog signal is proximate to one of the respective reference thresholds, receive ADC values based on different pseudorandom binary sequence (PRBS) values being applied to the analog signal; determine an offset error based on the ADC values; and provide a comparator input offset calibration signal at a calibration circuitry output if the estimated offset error is greater than an offset error threshold.