ADC Input Overload Detection for Fast Saturation Recovery
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Solution Overview
Problem
Analog to digital converters (ADCs) face issues with input overload conditions, where signals beyond the full-scale range cause internal components to enter saturation, leading to inaccurate digital code generation during recovery time.
Innovation Solution
The ADC compares input signals with full-scale levels, forcing amplifier inputs to zero during overload conditions to prevent saturation, and signals overload conditions to the output digital block, providing digital codes equivalent to the full-scale levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the ADC processes input signals beyond full-scale range, then the ADC can handle a wider signal range, but internal amplifiers enter saturation region causing inaccurate output and extended recovery time
Solution Approach 1:
The patent applies preliminary anti-action by detecting input overload conditions before they can drive amplifiers into saturation. The overload detection mechanism identifies when input signals exceed full-scale range and preemptively prevents saturation by controlling amplifier operation, thereby avoiding the harmful effects that would otherwise require recovery time to resolve
Solution Approach 2:
The patent implements feedback through an overload detection mechanism that monitors input signal levels and provides information about overload conditions to control the ADC operation. This feedback loop enables the system to adjust its behavior based on input signal strength, preventing amplifiers from entering saturation and ensuring accurate output code generation even during overload conditions
2Productivity
If the ADC allows amplifiers to operate during overload conditions, then the ADC continues processing signals, but amplifiers enter saturation causing recovery time delays
Solution Approach 1:
The patent prevents the harmful saturation effect before it occurs by detecting overload conditions and adjusting amplifier operation proactively. This eliminates the need for recovery time while maintaining continuous signal processing capability, as the amplifiers never enter saturation in the first place
Solution Approach 2:
The ADC system monitors its own operating conditions through overload detection and automatically adjusts its operation to prevent saturation. The system serves itself by detecting when input signals exceed full-scale range and independently controlling amplifier operation to avoid harmful effects, without requiring external intervention or recovery periods
3Productivity
If the ADC generates digital codes during overload conditions, then the ADC maintains output continuity, but the codes do not accurately represent the input signal
Solution Approach 1:
The patent introduces an intermediary overload detection mechanism that sits between the input signal and the digital code generation process. This intermediary detects when input signals exceed full-scale range and controls whether accurate conversion should occur, preventing the generation of misleading digital codes while maintaining continuous output operation
Solution Approach 2:
The overload detection feedback mechanism provides information about input signal validity to the digital code generation process. When overload conditions are detected, the feedback signal prevents the generation of inaccurate codes, ensuring that only codes representing actual input signal strength are outputted, thereby maintaining measurement precision
Data Source
AI summary
With high speed analog to digital converters (ADCs), components within the ADC can enter a saturation region when an input exceeded the input range of the ADC, which can cause errors. Here, a sample of an input signal to an ADC is compared with the upper and lower full-scale levels of the ADC. If input overload is detected, inputs to amplifiers in an input stage of the ADC are forced to zero for the duration of the input overload, and are thus prevented from going into saturation. Input overload conditions are signaled directly to an output digital block of the ADC, which provides output digital codes equivalent to either the upper or the lower full scale level depending on whether the input overload is signaled as exceeding the upper level or the lower level. Input overload recovery time of the ADC may thus be minimized.