Capacitor-Based ADC Circuit for Parallel Charge Summation

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Solution Overview

Problem

Conventional analog to digital converters and multiply-accumulate operations in digital signal processing face performance bottlenecks due to serial execution of multiplication and addition operations, leading to reduced system performance, especially in modern real-time artificial intelligence applications.

Innovation Solution

A high-speed analog to digital converter is developed, incorporating a sensor circuit to determine voltage variations across a capacitor, a charge adjustment circuit to adjust charges based on these variations using a reference charge unit, and a summation circuit to represent digital values, enabling parallel processing and reducing computational logic and intermediate storage requirements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If conventional digital signal processing uses serial multiplication and addition operations, then the system can be implemented with standard digital logic, but the processing speed is significantly reduced

Engineering Contradiction:

Improveprocessing speedVSAvoidsystem performance

Core Design Contradiction:

SpeedVSProductivity

Solution Approach 1:

The patent replaces conventional digital logic-based multiplication and addition operations with analog circuit operations. Multipliers use analog voltage-controlled current sources, and accumulators use analog current summation circuits, eliminating the need for sequential digital logic operations and enabling parallel processing of multiple operations simultaneously.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The invention changes the operational parameters from digital discrete values to analog continuous voltages and currents. By representing data as analog signals and performing computations through analog circuit behaviors (current mirroring, voltage control), the system achieves parallel execution of multiple multiply-accumulate operations without the sequential bottlenecks of digital logic.

Inventive Principle:

Principle #35Parameter changes

2Productivity

If multiple MACs are employed to perform digital multiplications in parallel, then the performance is improved, but intermediate results must be stored and read in registers which adds control logic complications and introduces delays

Engineering Contradiction:

Improvecomputation performanceVSAvoidcontrol logic complexity

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The patent extracts the intermediate storage function from digital registers and replaces it with analog holding circuits. The analog accumulators maintain intermediate results continuously in analog form without requiring digital-to-analog conversion or register storage, eliminating the control logic complexity associated with managing intermediate digital results.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The invention merges the multiplication and accumulation functions into unified analog MAC circuits where the output of one multiplication is directly summed with other products in the analog domain. This integration eliminates the need for separate storage and retrieval stages, reducing both control logic complexity and processing delays.

Inventive Principle:

Principle #5Merging (Combining)

3Quantity of substance

If the number of product pairs increases in conventional approaches, then the computation capacity is increased, but performance bottlenecks and implementation bottlenecks are reached

Engineering Contradiction:

Improvenumber of product pairsVSAvoidsystem performance

Core Design Contradiction:

Quantity of substanceVSProductivity

Solution Approach 1:

The patent segments the computation into multiple independent analog MAC units that can operate simultaneously. Each analog MAC circuit processes one or more product pairs in parallel using analog current summation, allowing the system to scale to a large number of product pairs without encountering the sequential bottlenecks of digital implementations.

Inventive Principle:

Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution significantly improves processing speed and efficiency by allowing parallel execution of operations, reducing power consumption, and minimizing area requirements, thereby enhancing performance in real-time applications.

Implementation Method 1

a sensor circuit configured to determine a variation in voltage across a capacitor

Methodology Applied

Scientific EffectVoltage detection: Electric Field

Implementation Method 2

a charge adjustment circuit configured to adjust charges in the capacitor based on the variation in voltage across the capacitor and based on a reference charge unit

Methodology Applied

Scientific EffectCharge transfer: Electrostatics

Data Source

PatentUS10819362B1High speed analog to digital converter

Publication Date: 2020.10.27 AMBIENT SCIENTIFIC INC

AI summary

A high speed analog to digital converter and methods for using the same are disclosed. In one embodiment, an analog to digital converter includes a sensor circuit configured to determine a variation in voltage across a capacitor, a charge adjustment circuit configured to adjust charges in the capacitor based on the variation in voltage across the capacitor and based on a reference charge unit, and a summation circuit configured to represent a digital value of the charges adjusted in response to the variation in voltage across the capacitor.