ADC-Based Phase Detector for Compact Clock Synchronization
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Solution Overview
Problem
Existing phase detection systems are inefficient in utilizing analog-to-digital converter (ADC) components, leading to increased production costs and circuit-board space usage.
Innovation Solution
An improved phase detector system that utilizes ADC components, including a sampling clock, comparators, and buffers to obtain and process comparison values between an analog signal and threshold voltages, determining the phase relationship between the analog signal and the sampling clock, and adjusting the clock accordingly to optimize sampling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional phase detector circuits are used, then phase detection function is achieved, but production cost and circuit-board space increase
Solution Approach 1:
The patent makes ADC components perform dual functions: their primary function of converting analog signals to digital values, and a secondary function of phase detection. By utilizing the existing comparator and buffer components within the ADC, the system eliminates the need for separate phase detector circuits, thereby reducing circuit-board space while maintaining phase detection capability
Solution Approach 2:
The patent combines the phase detection function with the ADC structure by merging the comparator outputs and buffer stages into a unified phase detection mechanism. The thermometer code outputs from multiple comparators are processed through buffer stages to simultaneously achieve both signal conversion and phase detection in a single integrated circuit
2Measurement precision
If traditional phase detector circuits are used, then phase detection function is achieved, but production cost increases
Solution Approach 1:
The patent makes ADC components perform dual functions: their primary function of converting analog signals to digital values, and a secondary function of phase detection. By utilizing the existing comparator and buffer components within the ADC, the system eliminates the need for separate phase detector circuits, thereby reducing circuit-board space while maintaining phase detection capability
Solution Approach 2:
The patent combines the phase detection function with the ADC structure by merging the comparator outputs and buffer stages into a unified phase detection mechanism. The thermometer code outputs from multiple comparators are processed through buffer stages to simultaneously achieve both signal conversion and phase detection in a single integrated circuit
3Device complexity
If ADC components are utilized for phase detection, then production cost and circuit-board space are reduced, but phase detection accuracy must be maintained
Solution Approach 1:
The patent employs feedback mechanisms where the phase detection output is used to adjust the sampling clock phase. The buffer stages provide controlled delay feedback to align the sampling instants with the analog signal transitions, ensuring accurate phase detection while utilizing the compact ADC structure
Solution Approach 2:
The patent uses the buffer stages to pre-position the comparator outputs at appropriate timing intervals before they are processed for phase detection. This preliminary timing adjustment ensures that the phase detection samples are taken at the correct moments in the signal cycle, maintaining accuracy despite the simplified circuit implementation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The system reduces production costs and circuit-board space by effectively utilizing existing ADC components, providing accurate phase detection and clock adjustments to synchronize with analog signal transitions, thereby improving phase detection efficiency.
Implementation Method 1
Each comparator 206 produces a '1' when the analog signal 202 is greater than its particular threshold voltage. Otherwise, the comparator output is '0'.
Implementation Method 2
The buffers 2071 to 207M cooperatively store and shift comparison values generated by the comparator 2064
Implementation Method 3
processing the first, second, and third comparison values to determine a phase relationship between the analog signal and the sampling clock
Data Source
AI summary
Methods and systems are provided for an improved phase detector utilizing analog-to-digital converter (ADC) components. In an embodiment, the method includes from an ADC having a sampling clock signal that determines sampling instants, obtaining a first comparison value between an analog signal and a first threshold voltage at a first sampling instant, and obtaining a second comparison value between the analog signal and a second threshold voltage at a second sampling instant. The method further includes, from a supplemental circuit, obtaining a third comparison value between the analog signal and a third threshold voltage at a third sampling instant between the first and second sampling instants. The method further includes processing the first, second, and third comparison values to determine a phase relationship between the analog signal and the sampling clock.