ADC Phase-Frequency Testing via FM Down-Conversion Delay Correction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional ADC phase-frequency response test methods suffer from limited test precision and a restricted frequency range, which affects the real-time quality of acquired signals and the performance of measurement instruments, especially in applications like real-time motion control and inertial navigation.
Innovation Solution
A method involving the measurement of down-conversion time delay using a phase unwrapping sine approximation method (PUSAM) for high and low carrier frequency FM signals, selecting an effective sampling frequency, and performing ADC phase-frequency response tests to correct initial phases and calculate phase-frequency responses, enabling tests on multiple channels with high precision and a wide frequency range exceeding the ADC's maximum sampling frequency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the conventional step signal method is used for ADC phase-frequency response test, then the test can be implemented in a specific frequency range, but the test precision is limited and the test frequency range is restricted
Solution Approach 1:
The patent changes the test signal type from step signal to continuous wave (CW) signal, and changes the testing approach from direct time-domain measurement to frequency-domain measurement using phase-locked loop (PLL). This parameter change enables the test to achieve high precision while extending the frequency range beyond the ADC's maximum sampling frequency, resolving the contradiction between measurement precision and frequency range adaptability
Solution Approach 2:
The patent replaces the conventional time-domain step signal measurement method with a frequency-domain PLL-based measurement method. This substitution allows the system to measure phase-frequency response at frequencies higher than the ADC's maximum sampling frequency by using frequency division and phase comparison, thereby extending the test frequency range while maintaining high measurement precision
2Adaptability or versatility
If the sampling frequency is increased to extend the test frequency range, then the test frequency range can be expanded, but the time delay uncertainty caused by signal start recording time and step signal conversion recording time difference increases
Solution Approach 1:
The patent replaces the time-domain step signal method with a frequency-domain PLL-based measurement method. The PLL locks onto the input signal frequency and provides a stable reference for phase measurement, eliminating the time delay uncertainty associated with step signal conversion and recording time synchronization. This allows frequency range extension without compromising time delay precision
Solution Approach 2:
The patent introduces a phase-locked loop (PLL) as an intermediary device between the ADC and the measurement system. The PLL acts as a frequency divider and phase reference generator, allowing the system to measure phase-frequency response at frequencies higher than the ADC's maximum sampling frequency while providing stable and precise time delay measurements, thus resolving the contradiction between frequency range and time delay precision
3Measurement precision
If the quantity of sampling points of the output response is increased to improve test precision, then the measurement precision can be improved, but the time consumed by the DFT transform increases apparently
Solution Approach 1:
The patent replaces the time-domain DFT transform method with a frequency-domain PLL-based measurement method. The PLL inherently provides frequency selection and phase measurement capabilities, allowing the system to achieve high measurement precision without requiring large numbers of sampling points and lengthy DFT transforms. This resolves the contradiction between measurement precision and test speed by using a fundamentally different measurement approach that is inherently faster and more precise
Data Source
AI summary
The present disclosure discloses a method for performing an ADC phase-frequency response test including: measuring a time delay of an analog mixer and low-pass filter (MLPF) in down-converting a specific carrier frequency narrowband frequency modulation (FM) signal; determining an effective sampling frequency required by an ADC for acquiring FM signals; acquiring a high carrier frequency FM signal and a low carrier frequency FM signal before and after down-conversion is performed by the analog MLPF; and demodulating the FM signals that are acquired, correcting an initial phase of a modulation signal of the high carrier frequency FM signal and an initial phase of a modulation signal of the low carrier frequency FM signal, and calculating a phase-frequency response of the ADC at a high carrier frequency. The present disclosure has advantages of a simple test process, a wide frequency range with frequencies and a test simultaneously performed on multiple channels.