ADC Nonlinearity Compensation via Polyphase Error Estimation
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Solution Overview
Problem
Analog-to-digital converters (ADCs) face challenges in compensating for nonlinear distortion, which increases signal bandwidth, necessitating higher sampling rates that strain circuit components and result in high computational complexity for inverse Volterra models.
Innovation Solution
An estimation and compensation circuit that interpolates digital input signals to estimate nonlinearity errors using linear filters and polyphase components, allowing for accurate error compensation without increasing the sampling rate, employing a discrete-time model equivalent to the continuous-time ADC model.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the sampling rate of the ADC is increased to capture the nonlinearly distorted signal, then the nonlinear distortion can be properly compensated, but the speed requirements on circuit components become harder and more demanding
Solution Approach 1:
The patent segments the nonlinear distortion compensation into multiple computational branches, each handling a specific frequency band or distortion component. This allows the system to process nonlinear distortion at the original sampling rate by dividing the complex compensation task into manageable segments, avoiding the need to increase the overall sampling rate while maintaining compensation accuracy
Solution Approach 2:
The patent changes the computational parameters by using discrete-time models with specific mathematical transformations (such as polyphase decomposition and frequency domain processing) that enable accurate nonlinear distortion compensation at the original sampling rate, rather than requiring higher sampling rates
2Measurement precision
If an inverse Volterra model is used to compensate for nonlinear distortion, then the nonlinear distortion can be corrected, but the computational complexity becomes relatively high
Solution Approach 1:
The patent divides the computational process into multiple parallel branches, each processing a specific aspect of the nonlinear distortion. This segmentation reduces the computational complexity of each individual branch while maintaining the overall accuracy of the compensation, avoiding the need for a single complex inverse Volterra model
Solution Approach 2:
The patent uses discrete-time models that are mathematically equivalent to continuous-time Volterra models but implemented through simplified computational structures. These discrete models copy the essential behavior of the continuous system while requiring less computational resources
Data Source
AI summary
An estimation unit for estimating a nonlinearity error of a conversion circuit, such as an ADC, is adapted to receive a continuous-time input signal and output a digital output signal. In at least one embodiment, the continuous-time input signal is essentially bandlimited to an angular frequency band [ω1, ω2], where ω1>(L−1)π/T, ω2<Lπ/T, L is a positive integer, and T is a sample period of the conversion circuit. The estimation unit includes an input port for receiving a digital input signal having a first sample rate 1/T and an output port for outputting a digital estimated error signal also having the first sample rate. For each integer P_k in a set of integers, the estimation unit a first linear filter unit for generating a first signal s1(n) as a linear function of the digital input signal, an interpolation unit for interpolating the first signal s1(n) to generate a second signal s2(m) having a second sample rate which is a factor L·R_k higher than the first sample rate, wherein L·R_k≧ω2·T·P_k/π, a nonlinearity unit for generating a third signal s3(m) as (s2(m))P<sub2>—</sub2>k, and a second linear filter unit for generating a component of the estimated error signal based on the third signal s3(m), wherein the component has the first sample rate. Furthermore, the estimation unit includes an adder circuit for generating the estimated error signal as the sum of the components of the estimated error signal. Moreover, at least one embodiment is directed to a compensation circuit including the estimation unit, corresponding methods for estimating and compensating nonlinearity errors, a computer program product, a computer readable medium, and a hardware-description entity.