ADC Reference Voltage Using Power Rails for Low-Noise Conversion
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Solution Overview
Problem
Existing analog-to-digital converters (ADCs) face challenges with noise, power consumption, and area occupancy due to large capacitors and reference voltage buffering, which affect conversion speed and resolution, especially when dealing with small reference voltages and additional bits for error correction.
Innovation Solution
The use of power-supply voltages as reference voltages to define a full-scale range, allowing for increased bit resolution and error correction without the need for buffer circuits and large capacitors, by scaling the quantized output based on the ratio of full-scale ranges, and incorporating redundant bits for noise suppression.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If large bypass capacitors are used to stabilize reference voltages and reduce noise, then noise is reduced and stability is improved, but area occupancy increases and power consumption increases
Solution Approach 1:
The patent extracts the reference voltage function from dedicated reference voltage generating circuits and uses the power supply voltages directly as reference voltages. This eliminates the need for separate reference voltage buffers and large bypass capacitors, thereby reducing area occupancy while maintaining voltage stability for ADC operation.
Solution Approach 2:
The power supply voltages are made to serve dual functions: both as power sources and as reference voltages for the ADC. This multi-functionality eliminates the need for separate reference voltage circuits and their associated large capacitors, reducing both area and power consumption while maintaining stability.
2Object-affected harmful factors
If reference voltage buffering circuits are used to reduce noise, then noise is reduced, but power consumption increases
Solution Approach 1:
The patent removes the dedicated reference voltage buffering circuits from the system by using power supply voltages directly as reference voltages. This extraction eliminates the power consumption associated with these buffer circuits while maintaining noise performance through proper power supply design.
Solution Approach 2:
The power supply voltages serve themselves as reference voltages without requiring additional buffering circuits. This self-service approach eliminates the need for extra power-consuming buffer stages while maintaining the stability and noise performance required for ADC operation.
3Measurement precision
If the number of bits of quantization is increased to maintain resolution, then resolution is maintained, but conversion speed decreases
Solution Approach 1:
The patent changes the reference voltage parameter from dedicated reference voltages to power supply voltages. This parameter change allows for increased quantization bits without proportionally increasing settling time, as the power supply voltages inherently have low impedance and fast settling characteristics, thereby maintaining resolution while preserving conversion speed.
4Measurement precision
If smaller reference voltages are used to detect small-amplitude input signals, then sensitivity is improved, but switch resistance increases
Solution Approach 1:
The patent changes the reference voltage parameter to power supply voltages, which provides a stable and low-impedance reference. This allows the use of smaller effective reference voltages for detecting small-amplitude signals while maintaining low switch resistance, as the power supply voltages provide a solid reference that does not require high switch overdrive voltages.
Data Source
AI summary
A conversion circuit that performs analog-to-digital conversion is described. During operation, the conversion circuit receives an input signal. Then, the conversion circuit performs analog-to-digital conversion and provides a quantized output corresponding to the input signal based at least in part on a first power-supply voltage and a second power-supply voltage of the conversion circuit. For example, the quantized output may be based at least in part on a comparison of the input signal to the first power-supply voltage and the second power-supply voltage. Moreover, the first power-supply voltage and the second power-supply voltage may specify a full-scale range of the conversion circuit. When the full-scale range exceeds a second full-scale range associated with reference voltages that are other than the first power-supply voltage and the second power-supply voltage, the quantized output may correspond to a larger number of bits than when the full-scale range equals the second full-scale range.