Time-Interleaved ADC Calibration with Relatively Prime Reference Clock

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Solution Overview

Problem

Conventional time-interleaved A/D converters face challenges in achieving high-speed sampling rates with high resolution due to mismatches in conversion gain, DC offset, sampling timing, non-linearity, and frequency characteristics among unitary A/D conversion units, which hinder accurate calibration, especially in next-generation applications like 4G portable phones and millimeter-wave radio.

Innovation Solution

A time-interleaved A/D converter with M unitary A/D conversion units, where a reference A/D conversion unit with a lower sampling rate and higher resolution is connected in parallel, allowing for calibration based on the output of the reference unit, using a digital calibration unit to correct mismatches in DC offset, conversion gain, and sampling timing, synchronized with the reference A/D conversion unit's sampling rate.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple unitary A/D conversion units operate concurrently to achieve high sampling rate, then productivity increases, but manufacturing precision deteriorates due to mismatches in conversion gain, DC offset, and sampling timing

Engineering Contradiction:
Improvesampling rateVSAvoidconversion accuracy
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

A reference A/D conversion unit is introduced as an intermediary to provide a common reference signal that all unitary A/D conversion units can synchronize to. This reference unit operates at a lower sampling rate but provides a stable timing and amplitude reference that eliminates mismatches among the high-speed unitary converters, allowing them to operate concurrently without degrading conversion accuracy

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system implements feedback by having each unitary A/D conversion unit compare its output with the reference A/D conversion unit's output and adjust its conversion gain and DC offset accordingly. This closed-loop feedback mechanism continuously corrects mismatches, enabling high sampling rates while maintaining manufacturing precision through automatic calibration

Inventive Principle:
Principle #23Feedback

2Manufacturing precision

If digital calibration is applied to correct mismatches among unitary A/D conversion units, then manufacturing precision improves, but device complexity increases

Engineering Contradiction:
Improveconversion accuracyVSAvoidcalibration circuit complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The calibration system is designed to be self-service by automatically detecting mismatches among unitary A/D conversion units and correcting them without external intervention. The reference A/D conversion unit and digital calibration circuits continuously monitor and adjust conversion gains and DC offsets, enabling the system to self-correct manufacturing precision issues while keeping the added complexity manageable through automation

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS8736470B2Analog/digital converter and semiconductor integrated circuit device
Publication Date: 2014.05.27 HITACHI LTD
  • US8736470B2 patent drawing
  • US8736470B2 patent drawing
  • US8736470B2 patent drawing

AI summary

A reference A/D conversion unit is connected in parallel to an input common to a time-interleaved A/D converter to be a calibration target, and the output of each unitary A/D conversion unit which makes up the time-interleaved A/D converter is calibrated in a digital region by using a low-speed high-resolution A/D conversion result output from the reference A/D conversion unit. Also, fCLK/N (fCLK represents an overall sampling rate of the time-interleaved A/D converter, and N is relatively prime to the number of unitary A/D conversion units connected in parallel M) is set as the operation clock frequency of the reference A/D conversion unit. Samplings of all unitary A/D conversion units can be sequentially synchronized with the sampling of the reference A/D conversion unit, and the operation clock frequency of the reference A/D converter can be made N times slower than the overall sampling rate of the time-interleaved A/D converter.