ADC Quick Tracking Circuit to Cut Level-Shifting Conversion Time
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional digital slope analog-to-digital conversion circuits operate slowly due to lengthy conversion times caused by level-shifting processes in capacitor arrays.
Innovation Solution
An analog-to-digital conversion circuit with a quick tracking mechanism, utilizing a positive capacitor array, a negative capacitor array, and control circuit that compares output voltages to determine if level-shifting is necessary, and switches capacitor combinations based on comparison results to expedite the conversion process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If level-shifting is performed step-by-step in capacitor arrays, then conversion accuracy is maintained, but conversion time increases and operation speed decreases
Solution Approach 1:
The patent implements dynamic tracking by comparing output voltages from positive and negative capacitor arrays and dynamically adjusting capacitor switching based on comparison results. The control circuit dynamically determines whether level-shifting is needed by monitoring voltage differences, enabling the system to adapt its operation mode (quick tracking vs. conventional step-by-step) based on real-time conditions, thus reducing conversion time while maintaining accuracy when needed.
2Ease of manufacture
If conventional digital slope conversion is used, then circuit implementation is straightforward, but operation speed is slow
Solution Approach 1:
The patent divides the conversion process into two parallel paths: a conventional digital slope conversion path and a quick tracking path. The circuit is segmented into positive and negative capacitor arrays that operate in parallel, with a control circuit that segments the decision-making process by using comparators to determine which path to follow. This segmentation enables faster operation while maintaining the simplicity of conventional implementation where applicable.
Solution Approach 2:
The patent changes the operational parameters of the capacitor arrays by introducing dual polarities (positive and negative) and dynamically adjusting the switching states based on voltage comparison results. This parameter change enables the system to switch between different conversion speeds, achieving faster operation when the quick tracking condition is met while maintaining compatibility with conventional conversion methods.
3Productivity
If quick tracking is implemented with dual capacitor arrays and comparators, then conversion speed increases, but device complexity increases
Solution Approach 1:
The patent merges the quick tracking functionality with the conventional digital slope conversion by integrating them into a unified circuit architecture. The positive and negative capacitor arrays are combined with shared control logic, and the comparators are integrated into the existing conversion framework. This merging allows the system to achieve faster conversion speeds while minimizing the increase in overall circuit complexity through resource sharing and integrated design.
Data Source
AI summary
The present invention discloses an analog-to-digital conversion circuit having quick tracking mechanism is provided. A positive and a negative capacitor arrays receive a positive and a negative input voltages and output a positive and a negative output voltages. A first and a second comparators performs comparison thereon respectively according to and not according to a reference voltage to generate a first and a second comparison results. A control circuit does not perform level-shifting when a difference between the positive and the negative output voltages is not within a predetermined range. The control circuit assigns the positive and the negative capacitor arrays a voltage up-tracking direction and a voltage down-tracking direction respectively to switch a capacitor enabling combination with digital codes according to the second comparison result, and outputs the digital codes as a digital output signal when the positive and the negative output voltages equal.