ADC Background Calibration Using Random Capacitor Sampling

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Solution Overview

Problem

Analog-to-digital converters (ADCs) face issues due to capacitance variations during manufacturing, leading to abnormal digital signals, which existing calibration methods fail to address effectively, affecting accuracy and reliability.

Innovation Solution

A digital background calibration circuit incorporating a digital random number generator and switches to control sampling capacitors, allowing for self-calibration by generating a digital sequence during the calibration period, reducing reliance on external signals and enhancing accuracy and reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If traditional calibration methods are used, then external calibration signals are required, but this increases device complexity and reduces ease of operation

Engineering Contradiction:
Improvecalibration operationVSAvoidcalibration system
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The ADC system performs self-calibration by using its own internal resources (sampling capacitors, switches, and digital logic) to generate calibration signals and adjust its own capacitance weights, eliminating the need for external calibration equipment or signals

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The sampling capacitors and switches serve dual purposes: they function as normal ADC components during conversion and as calibration components during the calibration phase, allowing the same hardware to perform multiple functions without adding extra dedicated calibration hardware

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Measurement precision

If capacitance variations are not corrected, then manufacturing simplicity is maintained, but measurement precision deteriorates

Engineering Contradiction:
Improvedigital signal accuracyVSAvoidcalibration circuit
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The system uses feedback by comparing the actual output of the ADC with expected values during calibration, then adjusting the capacitance weights of sampling capacitors based on this feedback to minimize errors and improve measurement precision

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The calibration process changes the electrical parameters (capacitance weights) of the sampling capacitors to compensate for manufacturing variations, thereby improving measurement precision without requiring physical redesign or selection of components

Inventive Principle:
Principle #35Parameter changes

3Productivity

If manual calibration is performed, then calibration accuracy can be controlled, but productivity decreases due to time-consuming calibration processes

Engineering Contradiction:
Improvecalibration speedVSAvoidcalibration accuracy
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The calibration is performed periodically or on-demand rather than continuously, allowing the ADC to operate at full speed for normal conversions while dedicating specific time intervals for calibration, thus maintaining both productivity and precision

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The calibration process is performed in advance during manufacturing or initialization, so that by the time the ADC is deployed for normal operation, the capacitance weights are already optimized, eliminating the need for time-consuming calibration during actual use

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10511318B2Digital background calibration circuit
Publication Date: 2019.12.17 NUVOTON
  • US10511318B2 patent drawing
  • US10511318B2 patent drawing
  • US10511318B2 patent drawing

AI summary

A digital background calibration circuit including a digital random number generator, an analog-to-digital converter (ADC) and a plurality of switches is provided. The digital random number generator is configured to generate a first digital sequence having a plurality of bits. The ADC includes a plurality of sampling capacitors. The switches receive the first digital sequence and are coupled to the sampling capacitors. During a calibration period, the digital random number generator controls the sampling capacitors via the switches to sample the first digital sequence.