ADC-Based Receiver Bias Calibration for Common-Mode Offset

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Solution Overview

Problem

Existing receiver technologies fail to effectively correct common mode offset and process, voltage, and temperature (PVT) variations across different types of integrated circuit (IC) chips and lanes, leading to performance variations and magnified signal offsets due to uncalibrated reference voltages.

Innovation Solution

A method involving an analog to digital converter (ADC) and ADC-based adaptation algorithm to determine digital codes of differential input voltages, compare them to an optimum common mode voltage (VCM), and adjust bias codes to match the VCM, ensuring each lane operates optimally, with on-chip or off-chip bias control.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If digital offset correction is applied without calibrating reference voltage, then differential offset can be reduced, but common mode offset and PVT variations remain uncorrected

Engineering Contradiction:

Improvedifferential offset correctionVSAvoidcommon mode voltage stability

Core Design Contradiction:

Measurement precisionVSReliability

Solution Approach 1:

The patent introduces an analog probe as an intermediary device that interfaces between the analog common mode voltage and the digital processing system. The probe converts the analog voltage to digital values through an ADC, enabling digital calibration algorithms to correct common mode offset while the actual analog correction is applied through bias circuits. This intermediary approach allows digital precision to improve common mode stability without requiring direct analog-analog calibration.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the parameter domain from purely analog to a hybrid analog-digital system. By converting the common mode voltage parameter to digital domain through ADC, the system can apply digital calibration codes to adjust bias voltages, thereby correcting PVT variations and common mode offset that cannot be addressed by digital-only methods. This parameter transformation enables comprehensive correction of both differential and common mode errors.

Inventive Principle:

Principle #35Parameter changes

2Measurement precision

If bias circuits are used to correct offset within each lane, then lane-specific differential offset is reduced, but variations between different IC chip types and lanes persist

Engineering Contradiction:

Improvelane-specific offset correctionVSAvoidperformance consistency across chip types

Core Design Contradiction:

Measurement precisionVSAdaptability or versatility

Solution Approach 1:

The patent creates a universal calibration system that serves multiple functions: it corrects lane-specific differential offset, adjusts common mode voltage for each lane, and compensates for PVT variations. The same ADC-based measurement and digital code generation process is applied uniformly across all lanes and is adaptable to different IC chip types (FF Corner, SS Corner), providing consistent performance across diverse hardware variations without requiring lane-specific or chip-type-specific design modifications.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Measurement precision

If conventional offset correction methods are applied, then some offset is reduced, but signal variations due to PVT variations and uncalibrated reference voltages are magnified

Engineering Contradiction:

Improveoffset reductionVSAvoidsignal variation magnification

Core Design Contradiction:

Measurement precisionVSObject-affected harmful factors

Solution Approach 1:

The patent performs preliminary calibration of the common mode voltage and reference voltages before the receiver processes actual signals. The ADC measures the common mode voltage and generates calibration codes that are stored and applied through bias circuits during normal operation. This preliminary action ensures that when signals are received, the system is already optimized to minimize PVT variations and prevent signal variation magnification, rather than attempting correction after degradation occurs.

Inventive Principle:

Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach corrects both differential and common mode offsets, calibrates reference voltages using a bandgap voltage, and ensures all lanes and IC types perform similarly, reducing signal variations and achieving optimal receiver performance.

Implementation Method 1

calibrates reference voltages using a bandgap voltage

Methodology Applied

Scientific EffectBandgap voltage reference:

Data Source

PatentUS11831287B2Common mode correction using ADC in analog probe based receiver

Publication Date: 2023.11.28 FARADAY TECH CORP

AI summary

A method for removing offset in a receiver of an integrated circuit (IC) includes: determining digital codes of differential input voltages of an amplifier in a first receiving lane of the receiver; comparing the digital codes to a digital code corresponding to an optimum common mode voltage (VCM) of the receiver; according to the comparison, determining a bias code for adjusting both the differential input voltages to match the optimum VCM; and inputting the bias code to a bias circuit of the receiver. The first receiving lane of the receiver includes a plurality of amplifiers. The method steps are repeated for each amplifier of the plurality of amplifiers, and then repeated for all receiving lanes of the IC.