ADC Receiver Analog Equalization Without a Precise Clock
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Solution Overview
Problem
ADC-based SerDes systems face a paradox in determining optimal CTLE settings for link training, as precise clock generation requires CTLE tuning, but CTLE tuning necessitates a precise clock.
Innovation Solution
The system measures frequency content and saturation of digital signals using digital filters and hardware monitors, allowing for the determination of updated analog equalization settings without a precise clock.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If CTLE tuning is performed to generate a precise clock, then clock precision is improved, but the process requires a precise clock which creates a circular dependency
Solution Approach 1:
The patent introduces digital signal processing as an intermediary method to measure frequency content and determine equalization settings without requiring a precise clock. Digital filters process the digital signal to extract frequency information, and a figure-of-merit calculation determines optimal CTLE settings, breaking the circular dependency between clock precision and CTLE tuning
Solution Approach 2:
The patent changes the measurement parameters from time-domain metrics (eye height, eye width) that require precise clocking to frequency-domain metrics (frequency content, spectral density) that can be measured directly from the digital signal. This parameter transformation allows CTLE tuning to proceed without a precise clock
2Measurement precision
If least-mean-square calculation is used to determine minimum mean square error, then measurement precision is improved, but a precise clock is required which creates a circular dependency
Solution Approach 1:
The patent replaces the least-mean-square calculation with digital filter-based frequency content measurement as an intermediary approach. Digital filters with specific coefficients process the digital signal to extract frequency information, and a figure-of-merit based on spectral density replaces the traditional error calculation, eliminating the need for precise clocking
3Measurement precision
If eye height or eye width measurements are used as figure-of-merit, then signal quality measurement is improved, but these measurements require an analog signal which is not available in ADC-based systems
Solution Approach 1:
The patent substitutes analog signal processing methods with digital signal processing methods. Instead of measuring eye height and eye width from analog waveforms, the patent uses digital filters to analyze the frequency spectrum of the digital signal, calculating spectral density and frequency content that serve as figure-of-merit metrics for ADC-based systems
Solution Approach 2:
The patent transforms the measurement parameters from spatial/temporal domain metrics (eye height, eye width) to frequency domain metrics (spectral density, frequency content). This parameter transformation enables signal quality assessment in ADC-based systems where the analog signal is no longer available
Data Source
AI summary
An analog-to-digital converter-based serial receiver configured to tune analog equalization settings for link training is described. An analog signal from a transmitter is received and the receiver applies initial analog equalization settings. The receiver then converts the equalized analog signal into a digital signal. The receiver then measures frequency content of the analog signal and saturation at the analog-to-digital converter and determines updated analog equalization settings.