ADC Reference Circuit Using Capacitor Hold for Fast Settling
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Solution Overview
Problem
Analog to digital converters face challenges in providing a stable and accurate voltage reference, especially at high sampling rates, due to the need for fast settling of the reference signal, which often requires high-power, high-bandwidth amplifiers that consume excessive chip space and power.
Innovation Solution
The use of a slower, lower-power amplifier in combination with a large capacitor to maintain the reference voltage, or a comparator controlling a switch between a voltage supply and the ADC reference input, allowing for quick settling with minimal power consumption, without the need for additional capacitors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a fast, wide bandwidth on-chip amplifier is used to drive the reference input to the ADC, then the reference signal settles quickly to the required accuracy, but the power consumption increases significantly
Solution Approach 1:
The reference supply system is segmented into two distinct parts: a slow, low-power amplifier for general reference maintenance and a fast amplifier activated only during conversion phases. This segmentation allows each amplifier to be optimized for its specific function, with the fast amplifier operating intermittently rather than continuously, thereby reducing overall power consumption while maintaining fast settling capability when needed.
Solution Approach 2:
The fast amplifier is activated periodically only during ADC conversion phases rather than operating continuously. The control circuitry detects when conversions are occurring and enables the fast amplifier only during these brief intervals. This periodic activation allows the system to maintain fast reference settling capability when required while minimizing power consumption during non-conversion periods when the fast amplifier would otherwise be idle.
2Use of energy by moving object
If a slow, lower power amplifier is used in combination with a large capacitor, then power consumption is reduced, but additional circuitry and chip space are required
Solution Approach 1:
A capacitor is introduced as an intermediary energy storage element between the slow amplifier and the ADC reference input. The capacitor accumulates charge during non-conversion phases and discharges during conversion phases, acting as a buffer that decouples the slow amplifier from the dynamic loading requirements. This intermediary allows the use of a simpler, lower-power amplifier while still meeting the fast settling requirement during conversions.
Solution Approach 2:
The capacitor is pre-charged during non-conversion phases in anticipation of the upcoming conversion phase. By accumulating energy beforehand, the capacitor is ready to quickly supply the reference voltage during conversions without requiring the amplifier to respond rapidly. This preliminary charging action allows the system to prepare in advance for high-speed reference requirements using only low-power components.
3Reliability
If off-chip voltage reference sources are used, then temperature compensated voltage references are provided, but additional circuitry is required on chip to isolate the reference from dynamic loading
Solution Approach 1:
The patent merges the advantages of off-chip references (temperature compensation, stability) with on-chip integration by using a simple on-chip buffer amplifier and capacitor combination. This integrated approach provides the same isolation and stability benefits as complex off-chip solutions but with reduced circuit complexity and better integration. The buffer amplifier isolates the external reference from dynamic loading while the capacitor provides local energy storage, achieving both reliability and simplicity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
These solutions enable efficient and stable voltage reference provision for high-speed ADCs, reducing power consumption and simplifying amplifier design, while maintaining accurate conversions.
Implementation Method 1
a relatively large capacitor connected to the same node as the amplifier output and connectable to the ADC reference input. The capacitor is charged substantially to the external reference voltage
Implementation Method 2
a comparator (Comp1) receiving Vref at a first one of its signal inputs and an internal voltage reference signal Vref_internal present at a reference input of a DAC forming part of the analog to digital converter at a second one of its signal inputs, the comparator being further arranged to output a difference control signal in dependence on a difference between Vref and the internal voltage reference signal Vref_internal
Data Source
AI summary
The present disclosure provides alternative solutions to the problem of providing a stable voltage reference to high speed ADCs that possess high sampling rates. In one example the high speed amplifier is replaced by a smaller, slower, lower power amplifier in combination with a relatively large capacitor connected to the same node as the amplifier output and the ADC reference input. The capacitor is charged substantially to the external reference voltage and hence keeps the reference input of the ADC almost at the external reference voltage between conversions, such that when conversion is about to occur and the external reference is switched in then very little charge is required from the external reference, and hence the reference signal quickly settles. An alternative arrangement is to replace the amplifier with a comparator that takes as one of its inputs the external reference signal, and as the other of its inputs the internal reference to the ADC, and makes use of a control circuit that adjusts the threshold of the comparator from bit-trial to bit-trial until the internal reference is brought up to substantially the same signal level as the external reference. When the external reference is then switched in to supply the ADC circuit it settles very quickly and draws very little power therefrom.