ADC Reference Voltage Calibration for Input-Dependent Errors
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Solution Overview
Problem
Analog-to-digital converters (ADCs) face challenges with reference voltage error corrections due to input signal dependency, leading to errors that conventional methods struggle to address quickly and efficiently, especially in high-speed applications, as existing solutions require additional ADCs and are not fast enough to correct cycle-to-cycle errors.
Innovation Solution
Incorporating a digital processor within the ADC system to digitally correct reference voltage errors each clock cycle by reusing sampling elements for both input signal and reference voltage, using correction algorithms that account for bit weights and input signal dependencies, thereby generating a digital output free or reduced of reference voltage errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If pure analog approaches are used to generate reference voltages, then PVT independence is improved, but power consumption and complexity increase significantly
Solution Approach 1:
The patent introduces a digital processor as an intermediary component that measures reference voltage errors and applies corrections to the digital output. This mediator bridges the gap between the imperfect analog reference voltage and the desired accurate digital output, avoiding the need for complex pure analog reference voltage generation circuits.
Solution Approach 2:
The patent replaces complex analog correction circuits with digital processing. Instead of using analog components to correct reference voltage errors, the system uses digital measurement and computation to calculate and apply corrections, simplifying the overall system architecture.
2Reliability
If separate ADC error correction paths are used, then slow errors are corrected, but fast cycle-to-cycle errors cannot be corrected quickly enough
Solution Approach 1:
The patent makes the sampling elements serve multiple functions: they sample both the input signal and the reference voltage. This multi-functionality allows the same hardware to be used for both normal conversion and error measurement, enabling fast cycle-to-cycle correction without adding separate correction ADCs.
Solution Approach 2:
The patent implements continuous error measurement and correction at every conversion cycle. The digital processor continuously measures reference voltage errors and applies corrections in real-time, ensuring that both slow drift errors and fast cycle-to-cycle errors are continuously corrected without interruption.
3Measurement precision
If sufficient settling time is allowed between cycles, then Vin dependency is eliminated, but significant delays occur for high speed ADCs
Solution Approach 1:
The patent uses periodic sampling of the reference voltage during each conversion cycle to measure errors. By periodically measuring the reference voltage at specific moments during normal operation and using digital processing to correct errors, the system achieves accurate reference voltage compensation without requiring extended settling time that would slow down conversions.
Data Source
AI summary
Embodiments of the present invention may provide an analog-to-digital converter (ADC) system. The ADC system may include an analog circuit to receive an input signal and a reference voltage, and to convert the input signal into a raw digital output. The analog circuit may include at least one sampling element to sample the input signal during a sampling phase and reused to connect to the reference voltage during a conversion phase, and an ADC output to output the raw digital output. The ADC system may also include a digital processor to receive the raw digital output and for each clock cycle, to digitally correct reference voltage errors in the analog-to-digital conversion.