Successive-Approximation ADC Reference Switching for Compact Image Sensors

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Solution Overview

Problem

Existing solid-state imaging apparatuses face challenges with settling errors in reference voltage stabilization, leading to increased size and cost due to the use of external decouple capacitors in successive comparison type A/D converters.

Innovation Solution

A multiplexer selects reference voltages for coarse and fine A/D conversions, and a capacitor array generates an analog reference signal using these voltages, reducing the need for external decouple and redundant capacitors, thereby minimizing settling errors and chip area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If external decouple capacitors are used to stabilize reference voltage, then settling error is reduced, but apparatus size and cost increase

Engineering Contradiction:
Improvereference voltage stabilizationVSAvoidapparatus size
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent merges the decouple capacitor function into the existing capacitor array used for D/A conversion. The capacitor array serves dual purposes: generating comparison voltages and stabilizing reference voltage, thereby eliminating the need for separate external decouple capacitors and reducing overall apparatus size while maintaining voltage stabilization.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The capacitor array is designed to perform multiple functions: it generates comparison voltages for the D/A converter and simultaneously acts as a decouple capacitor for reference voltage stabilization. This multi-functionality reduces the total component count and eliminates the need for separate external capacitors.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If redundant capacitors are added for correction operation, then settling error is corrected, but chip area and cost increase

Engineering Contradiction:
Improvesettling error correctionVSAvoidchip area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The correction capacitor is integrated into the existing capacitor array structure rather than being added as a separate external component. By utilizing the same capacitor array for both D/A conversion and correction operations, the patent achieves error correction functionality without increasing chip area.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The capacitor array serves itself by performing multiple functions including the correction operation. The same capacitors used for voltage generation are also used for error correction, eliminating the need for additional dedicated correction components and reducing overall chip area.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS9041580B2Solid-state imaging apparatus and semiconductor device
Publication Date: 2015.05.26 RENESAS ELECTRONICS CORP
  • US9041580B2 patent drawing
  • US9041580B2 patent drawing
  • US9041580B2 patent drawing

AI summary

The present invention provides a small-sized inexpensive solid-state imaging apparatus. A D/A converter included in a successive comparison type A/D converter of the solid-state imaging apparatus includes a multiplexer which selects any of reference voltages VR0 to VR16 and sets it as an analog reference signal when coarse A/D conversion is performed, and which selects reference voltages VR (n−1) to VR (n+2) of the reference voltages VR0 to VR16 when fine A/C conversion is performed, and a capacitor array which generates an analog reference signal, based on the reference voltages VR (n−1) to VR (n+2) when the fine A/D conversion is performed. It is thus possible to reduce settling errors in reference voltage without using redundant capacitors.