ADC Residue Coding for Better CDAC Linearity
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Solution Overview
Problem
Existing analog-to-digital converters (ADCs) face challenges in achieving precise and accurate conversion of analog signals due to nonlinearity errors caused by mismatched capacitance ratios in capacitive digital-to-analog converters (CDACs), which can lead to deviations from desired statistical properties and increased nonlinearity.
Innovation Solution
The ADC derives a first code approximating the combination of an analog input value and a dither value, and a second code representing the residue, which are combined to improve linearity by applying them to a capacitor array, thereby reducing the impact of capacitor mismatch errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If conventional binary-weighted encoding is used in CDAC, then the ADC structure is simple, but nonlinearity error increases due to capacitor mismatch
Solution Approach 1:
The capacitor array is divided into multiple segments, each handling a specific portion of the conversion process. This segmentation allows for better error distribution and reduced impact of individual capacitor mismatches on overall linearity.
Solution Approach 2:
The patent changes the encoding parameter from conventional binary-weighted to a modified encoding scheme that incorporates error compensation mechanisms, thereby improving linearity while maintaining structural simplicity.
2Measurement precision
If capacitor mismatch is reduced to improve linearity, then manufacturing precision must be increased, but manufacturing cost and difficulty increase
Solution Approach 1:
The patent implements feedback mechanisms that measure and compensate for capacitor mismatch errors during operation, allowing the ADC to achieve high linearity without requiring extremely tight manufacturing tolerances.
Solution Approach 2:
Multiple capacitor arrays or segments are used as copies, where errors in one can be compensated by others, reducing the need for individually precise capacitors while maintaining overall linearity.
3Measurement precision
If higher resolution encoding is used, then measurement precision improves, but device complexity increases
Solution Approach 1:
The high-resolution conversion is achieved by segmenting the process into multiple lower-resolution steps, where each segment handles a portion of the bits. This reduces the complexity of individual encoding structures while achieving high overall resolution.
Data Source
AI summary
Herein disclosed is an example analog-to-digital converter (ADC) and methods that may be performed by the ADC. The ADC may derive a first code that approximates a combination of an analog input value of the ADC and a dither value for the ADC sampled on a capacitor array. The ADC may further derive a second code to represent a residue of the combination with respect to the first code applied to the capacitor array. The ADC may combine the numerical value of the first code and the numerical value of the second code to produce a combined code applied to the capacitor array for deriving a digital output code. Combining the numerical value of the first code and the numerical value of the second code in the digital domain can provide for greater analog-to-digital (A/D) conversion linearity.


