Top-Plate Sampling ADC Residue Amplifier Linearity Adjustment
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Solution Overview
Problem
Non-linearity in the residue stage of top plate sampling ADC topologies reduces the accuracy of analog-to-digital converters (ADCs).
Innovation Solution
Incorporating a residue amplifier with a differential pair of transistors and a linearity adjustment circuit that adjusts its state as a function of the input sampling phase and gain phase, biasing the transistors in a depletion region or source follower mode to reduce ADC errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a top plate sampling ADC topology is used, then the ADC can process high-speed signals, but non-linearity in the residue stage reduces conversion accuracy
Solution Approach 1:
The patent applies dynamics by making the tail current adjustable through a control voltage that varies with the common-mode input voltage. This dynamic adjustment of the tail current compensates for non-linearity in the residue amplifier stage, maintaining high conversion accuracy while preserving the high-speed signal processing capability of the top plate sampling topology
Solution Approach 2:
The patent changes the parameter of tail current magnitude based on the common-mode input voltage level. By dynamically adjusting this parameter, the system compensates for non-linear effects in the residue stage, thereby improving conversion accuracy without sacrificing the high-speed performance inherent in the top plate sampling architecture
2Device complexity
If the residue amplifier operates in standard mode, then the circuit is simple, but linearity is poor causing ADC errors
Solution Approach 1:
The patent changes the operating parameter of the residue amplifier by dynamically adjusting the tail current based on the common-mode input voltage. This parameter adjustment improves linearity and reduces ADC errors while maintaining relatively simple circuit architecture, thus resolving the contradiction between circuit simplicity and measurement precision
Data Source
AI summary
A top-plate sampling analog-to-digital converter (ADC) circuit includes a first ADC stage and a residue amplifier coupled to the first ADC stage. The residue amplifier comprises a first transistor with a control terminal, a first current terminal, and a second current terminal. The residue amplifier also comprises a second transistor with a control terminal, a first current terminal, and a second current terminal. The residue amplifier also comprises a linearity adjustment circuit coupled to a second current terminal of at least one of the first transistor and the second transistor. The linearity adjustment circuit comprises at least one switch that changes its state as a function of an input sampling phase and a gain phase of the residue amplifier.