Reconfigurable ADC Resistor Ladder for Multi-Resolution Conversion
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Solution Overview
Problem
Existing analog-to-digital converters require multiple converters to achieve high or low resolution for multiple analog signals, leading to increased layout area and cost, and lack versatility in switching between these resolutions.
Innovation Solution
An analog-to-digital converter design that includes unit circuits with series resistor circuits and comparators to generate reference voltages, coupling switches to connect these circuits, and a sharing switch to share analog signals, allowing for flexible configuration to achieve various resolutions by connecting or separating unit circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple AD converters are provided to satisfy both high resolution and low resolution conversion needs for multiple analog signals, then both high resolution conversion and multi-signal conversion capabilities are achieved, but layout area and cost increase significantly
Solution Approach 1:
The patent implements a single AD converter that can function as multiple independent converters through the use of switching circuits. The converter can be configured to process either one analog signal at high resolution or multiple analog signals at low resolution, making the hardware universal and adaptable to different conversion needs without requiring separate dedicated converters for each scenario
Solution Approach 2:
The AD converter is divided into functional segments including switching circuits, comparing potential generator, and encoder circuit that can be independently controlled. By segmenting the conversion process and using switching mechanisms, the system can dynamically allocate resources to handle different numbers of analog signals with different resolution requirements, reducing the need for multiple complete converter units
2Adaptability or versatility
If multiple AD converters are provided to satisfy both high resolution and low resolution conversion needs for multiple analog signals, then both high resolution conversion and multi-signal conversion capabilities are achieved, but cost increases significantly
Solution Approach 1:
The patent implements a single AD converter that can function as multiple independent converters through the use of switching circuits. The converter can be configured to process either one analog signal at high resolution or multiple analog signals at low resolution, making the hardware universal and adaptable to different conversion needs without requiring separate dedicated converters for each scenario
Solution Approach 2:
The patent merges multiple conversion functions into a single integrated circuit by combining switching circuits, comparing potential generators, and encoder circuits into one unified AD converter structure. This consolidation reduces component count and manufacturing complexity compared to using multiple separate converters
3Measurement precision
If a single AD converter is configured for high resolution conversion, then high resolution is achieved, but the ability to convert multiple analog signals simultaneously is lost
Solution Approach 1:
The patent introduces dynamic reconfiguration capability through switching circuits that can change the converter's operating mode in real-time. The system can dynamically switch between high-resolution single-signal mode and low-resolution multi-signal mode based on input conditions, making the resolution and signal handling capabilities adaptable rather than fixed
Solution Approach 2:
The AD converter is divided into functional segments including switching circuits, comparing potential generator, and encoder circuit that can be independently controlled. By segmenting the conversion process and using switching mechanisms, the system can dynamically allocate resources to handle different numbers of analog signals with different resolution requirements
Data Source
AI summary
An analog-to-digital converter that converts an inputted analog signal into a digital value is disclosed that may include unit circuits that each generate reference voltages comprising regular potential intervals by a series resistor circuit connected between a high potential side reference voltage and a low potential side reference voltage and convert the reference voltages into a digital value by comparing the reference voltages with the inputted analog signal, and an adder that adds the digital values converted by the unit circuits. Each unit circuit may include coupling switches that couple the series resistor circuit with the series resistor circuit of another one of the unit circuits and connect the series resistor circuits between the high potential side reference voltage and the low potential side reference voltage and a sharing switch that shares the inputted analog signal with the other unit circuit that is coupled with the series resistor circuit.


