Sigma-Delta ADC Auxiliary Feedback for Runaway Recovery
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Solution Overview
Problem
Sigma-delta ADCs often enter a 'runaway' state when the supply voltage exceeds or is lower than the analog input signal range, causing the feedback loop to oscillate and become non-functional, requiring a time-consuming reset to resume normal operation.
Innovation Solution
Incorporating auxiliary comparators and an auxiliary DAC that can handle large absolute value error signals, boosting the feedback signal to normalize the ADC operation and prevent or exit a runaway state without resetting.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the supply voltage range is substantially larger than the analog input signal range, then the ADC can handle a wider voltage range, but the feedback loop becomes unstable and enters a runaway state
Solution Approach 1:
An auxiliary error signal is introduced as an intermediary to mediate between the large supply voltage range and the smaller analog input signal range. The auxiliary error signal is generated by comparing the analog input signal with an auxiliary feedback signal derived from the supply voltage, and this auxiliary error signal is used to adjust the main feedback signal to prevent runaway states.
Solution Approach 2:
The feedback loop is segmented into two independent loops: a main feedback loop handling the analog input signal and an auxiliary feedback loop handling the supply voltage range. The auxiliary loop processes the supply voltage through an auxiliary DAC and auxiliary comparator to generate an auxiliary feedback signal that compensates for the main loop, preventing instability caused by the large voltage range.
2Reliability
If the ADC enters a runaway state, then the feedback loop oscillates and becomes non-functional, but resetting the ADC requires substantial time
Solution Approach 1:
The auxiliary feedback loop performs preliminary action by continuously monitoring the supply voltage and generating an auxiliary feedback signal that preemptively compensates for conditions that would lead to a runaway state. This prevents the feedback loop from entering an unstable oscillating state in the first place, eliminating the need for time-consuming resets.
Solution Approach 2:
An auxiliary feedback mechanism is implemented where the auxiliary error signal, derived from comparing the analog input with an auxiliary feedback signal based on supply voltage, feeds back to adjust the main feedback signal. This continuous feedback prevents the buildup of errors that would cause runaway states, maintaining stable operation without requiring reset.
3Ease of operation
If the main DAC operates alone to produce feedback signal, then the device complexity is lower, but it cannot bring the error signal back into normal range during runaway state
Solution Approach 1:
The feedback system is segmented into a main DAC for normal operation and an auxiliary DAC for runaway state correction. The main DAC generates the primary feedback signal from the digitized error signal, while the auxiliary DAC generates an additional feedback signal based on the auxiliary error signal. This segmentation allows each DAC to be optimized for its specific function while working together to prevent and correct runaway states.
Solution Approach 2:
The auxiliary DAC acts as an intermediary that generates an additional feedback signal to supplement the main DAC's output. This auxiliary feedback signal, derived from the auxiliary error signal, mediates the correction of large error signals during runaway states, enabling the system to bring errors back into the normal range without requiring complete system reset.
Data Source
AI summary
In some embodiments, an analog-to-digital converter (ADC) comprises a loop filter configured to produce an error signal based on a difference between an analog input signal and a feedback signal. The ADC also comprises a main comparator set comprising one or more main comparators, the main comparator set configured to digitize the error signal and further configured to drive a main digital-to-analog converter (DAC). The ADC further comprises an auxiliary comparator set comprising a plurality of auxiliary comparators, the auxiliary comparator set configured to digitize the error signal when the ADC is in a runaway state and further configured to drive an auxiliary DAC to bring the error signal into a predetermined range.