ADC Error Signal Normalization for Runaway Loop Recovery

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Solution Overview

Problem

Sigma-delta ADCs can enter a 'runaway' state when the supply voltage dominates the feedback loop, causing oscillation and rendering the converter non-functional, requiring a time-consuming reset to resume normal operation.

Innovation Solution

Incorporating auxiliary comparators and an auxiliary DAC to digitize and correct error signals with wider reference ranges, allowing for quick normalization of the feedback loop and removal from a runaway state without reset.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the supply voltage range substantially exceeds the analog input signal range, then the ADC can handle larger voltage variations, but the feedback loop becomes dominated by supply voltage causing runaway state and oscillation

Engineering Contradiction:
Improvevoltage range handlingVSAvoidfeedback loop stability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The comparator set is divided into main comparators for normal operation and auxiliary comparators for runaway state detection. The auxiliary comparators monitor when the error signal exceeds predetermined thresholds, enabling segmented handling of different operational states to prevent feedback loop domination by supply voltage

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

An auxiliary digital-to-analog converter (DAC) is introduced as an intermediary component that activates during runaway states to generate corrective feedback signals. This auxiliary DAC mediates between the auxiliary comparators and the main feedback loop, providing intermediate correction action to restore stability without requiring full system reset

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If the ADC enters a runaway state, then the error signal exceeds the predetermined range, but the main comparators cannot digitize the error signal accurately

Engineering Contradiction:
Improveerror signal digitization accuracyVSAvoiderror signal range coverage
Core Design Contradiction:
Measurement precisionVSAdaptability or versatility

Solution Approach 1:

The comparator functionality is segmented into main comparators with narrow reference ranges for precise normal operation and auxiliary comparators with wide reference ranges for runaway state detection. This segmentation allows each comparator set to operate within its optimal range, maintaining measurement precision while expanding overall adaptability

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system transitions from a single comparator set operating in one dimension (normal range) to a two-dimensional architecture where auxiliary comparators provide coverage in extended voltage dimensions. This dimensional expansion enables accurate error signal digitization across both normal and runaway states without compromising precision in either regime

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Reliability

If the ADC is reset to resume normal operation from a runaway state, then the ADC can return to functional operation, but the reset process is time-consuming

Engineering Contradiction:
ImproveADC functionality restorationVSAvoidreset time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The auxiliary comparators and auxiliary DAC are pre-configured and continuously monitoring, ready to activate immediately upon detecting runaway conditions. This preliminary preparation enables instantaneous corrective action without waiting for system reset sequences, dramatically reducing the time to restore functionality

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

A fast-acting feedback mechanism is implemented where auxiliary comparators detect runaway states and immediately trigger the auxiliary DAC to generate corrective feedback signals. This closed-loop feedback operates independently of the main ADC reset sequence, enabling rapid self-correction that eliminates time-consuming reset delays

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS10666276B2Normalizing error signal in analog-to-digital converter runaway state
Publication Date: 2020.05.26 TEXAS INSTRUMENTS INC
  • US10666276B2 patent drawing
  • US10666276B2 patent drawing

AI summary

In some embodiments, an analog-to-digital converter (ADC) comprises a loop filter configured to produce an error signal based on a difference between an analog input signal and a feedback signal. The ADC also comprises a main comparator set comprising one or more main comparators, the main comparator set configured to digitize the error signal and further configured to drive a main digital-to-analog converter (DAC). The ADC further comprises an auxiliary comparator set comprising a plurality of auxiliary comparators, the auxiliary comparator set configured to digitize the error signal when the ADC is in a runaway state and further configured to drive an auxiliary DAC to bring the error signal into a predetermined range.