ADC Selection for Constant Accumulation Time in CMOS Image Sensors
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Solution Overview
Problem
Existing image processing technologies face challenges in preventing the generation of invalid frames due to non-constant accumulation time in CMOS image sensors, while also struggling to achieve low power consumption.
Innovation Solution
An image processing device and method that selects the number of ADCs used based on the decimation rate of pixel signals, maintaining a constant product of ADCs and decimation rate to ensure consistent shutter and read operations, thereby preventing invalid frames and reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the number of ADCs is increased to maintain constant accumulation time, then image quality and speed are improved, but power consumption increases
Solution Approach 1:
The patent dynamically switches between different ADC operation modes (first ADC mode with higher speed/resolution and second ADC mode with lower speed/resolution) based on whether constant accumulation time is required. This dynamic adaptation allows the system to use high-performance ADC operation only when necessary, reducing power consumption during normal operation while maintaining image quality when needed.
Solution Approach 2:
The patent changes operational parameters (speed and resolution) of the ADC based on the accumulation time requirements. By adjusting these parameters dynamically, the system can reduce power consumption by operating at lower speed and resolution when constant accumulation time is not required, while maintaining high image quality when it is required.
2Use of energy by moving object
If ADC operation is switched to reduce power consumption, then power consumption is reduced, but accumulation time becomes non-constant creating invalid frames
Solution Approach 1:
The patent implements dynamic switching between two distinct ADC operation modes: a first mode that maintains constant accumulation time (ensuring frame validity) and a second mode that reduces power consumption. The system dynamically selects the appropriate mode based on whether constant accumulation time is required, thus maintaining reliability while reducing power consumption when possible.
Solution Approach 2:
The patent changes the operational parameters of the ADC between two modes: one configuration that ensures constant accumulation time for valid frame generation, and another configuration that reduces power consumption. This parameter switching allows the system to balance between reliability (frame validity) and power efficiency based on operational requirements.
3Reliability
If constant accumulation time is maintained using traditional methods, then frame validity is ensured, but power consumption increases due to continuous high-performance ADC operation
Solution Approach 1:
The patent dynamically adapts ADC operation based on whether constant accumulation time is required. Instead of continuously operating in high-performance mode, the system switches to a lower-power mode when constant accumulation time is not needed, significantly reducing power consumption while maintaining frame validity when required.
Solution Approach 2:
The patent changes ADC operational parameters (speed and resolution) based on the requirement for constant accumulation time. By adjusting these parameters dynamically between two modes, the system ensures frame validity when needed while reducing power consumption during normal operation, avoiding continuous high-performance operation.
Data Source
AI summary
To prevent generation of an invalid frame while suppressing power consumption. An image processing device including an ADC unit including a plurality of ADCs configured to convert a pixel signal read from an image sensor from an analog format to a digital format, and a selection unit configured to select the number of used ADCs, which is the number of ADCs used, among the plurality of ADCs on the basis of a decimation rate of pixels in reading of the pixel signal from the image sensor, in which the number of used ADCs and the decimation rate are switched such that a product of the number of used ADCs and the decimation rate is maintained to be a constant state.