Multi-Channel ADC Self-Calibration for Gain and Clock Mismatch

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Solution Overview

Problem

High-precision multi-channel ADCs face significant challenges due to clock and gain mismatch errors, which impact system performance in applications like radar and multi-channel wireless communication, and existing solutions fail to effectively address these issues while also requiring low power consumption and small area occupancy.

Innovation Solution

A multi-channel high-precision ADC circuit with self-calibration capabilities, incorporating gain error compensation and clock phase error compensation circuits, along with N-bit analog-digital converters, gain and clock phase error quantization circuits, and a control circuit, which allows for automatic calibration and compensation of mismatch errors, reducing power consumption by turning off quantization circuits during compensation mode.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If multi-channel ADCs are integrated on the same chip to reduce space, then area occupancy is reduced, but clock and gain mismatch errors occur between channels

Engineering Contradiction:
Improvearea occupancyVSAvoidmismatch error
Core Design Contradiction:
Area of stationary objectVSMeasurement precision

Solution Approach 1:

The patent implements self-calibration functionality within the ADC circuit itself. The calibration circuit automatically detects and corrects gain and clock phase mismatch errors between channels without requiring external calibration equipment, enabling the system to self-correct the precision degradation caused by multi-channel integration

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent adjusts circuit parameters dynamically during calibration mode to compensate for mismatch errors. By changing operating parameters such as reference voltage levels and clock phase relationships, the system optimizes performance and eliminates errors introduced by device parameter mismatch between different chip areas

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If self-calibration circuits are added to compensate for mismatch errors, then measurement precision is improved, but device complexity increases

Engineering Contradiction:
Improvemismatch error compensationVSAvoidcircuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent combines the calibration circuit with the existing ADC structure, sharing common components such as reference voltage sources and signal paths. This integration approach allows error compensation functionality to be added without proportionally increasing overall circuit complexity

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The calibration operation is performed periodically in calibration mode rather than continuously. The control circuit switches between calibration mode and normal conversion mode, executing mismatch error compensation at intervals, which reduces the average complexity and power consumption compared to continuous calibration

Inventive Principle:
Principle #19Periodic action

3Measurement precision

If continuous calibration is performed to maintain precision, then measurement precision is improved, but power consumption increases

Engineering Contradiction:
Improvemismatch error calibrationVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent implements periodic calibration by switching between calibration mode and normal conversion mode. The calibration circuit operates only during designated calibration intervals rather than continuously, significantly reducing average power consumption while maintaining measurement precision through regular error correction

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent maintains calibration results between calibration periods by storing correction parameters in registers. The calibrated state is preserved during normal operation, ensuring continuous precision without requiring continuous calibration activity, thus eliminating unnecessary power consumption

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS10742226B1Multi-channel high-precision ADC circuit with self-calibration of mismatch error
Publication Date: 2020.08.11 58TH RES INST OF CETC
  • US10742226B1 patent drawing
  • US10742226B1 patent drawing
  • US10742226B1 patent drawing

AI summary

The invention discloses a multi-channel high-precision ADC circuit with self-calibration of mismatch error, belonging to the technical field of integrated circuit. The multi-channel high-precision ADC circuit with self-calibration of mismatch error comprises a gain error compensation circuit, a clock phase error compensation circuit, an N-bit analog-digital converter of M-channel, a gain error quantization circuit, a clock phase error quantization circuit and a control circuit. The multi-channel high-precision ADC circuit with self-calibration of mismatch error can automatically choose the calibration precision according to system precision and hardware overhead, and has the characteristic of low power consumption.