ADC Sequence Arbiter for Priority-Based Conversion Scheduling

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Solution Overview

Problem

The demand for analog-to-digital converters (ADCs) in modern electronic applications, particularly in motor control devices, exceeds the available supply, and existing ADCs lack effective management of conversion requests based on priority.

Innovation Solution

An analog-to-digital converter apparatus featuring an input multiplexer circuit, a trigger multiplexer circuit, and a sequence arbiter that manages conversion sequences by prioritizing requests, allowing higher-priority sequences to interrupt or postpone lower-priority ones, using configuration signals to control the conversion process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple ADC converters are provided to meet increasing demand, then conversion capacity increases, but device complexity and cost increase

Engineering Contradiction:
Improveconversion capacityVSAvoiddevice complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

A single ADC converter is made universal by adding a sequence arbiter that can dynamically assign it to multiple different conversion sequences based on priority. The ADC serves multiple functions by handling different sequences (e.g., sequence 1, sequence 2, sequence 3) at different times, eliminating the need for multiple dedicated ADCs while maintaining high conversion capacity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system introduces dynamic sequence management through the sequence arbiter, which dynamically determines which conversion sequence receives service from the ADC based on priority levels. The ADC's function is not static but changes over time depending on the priority state of different sequences, allowing efficient resource utilization without increasing hardware complexity.

Inventive Principle:
Principle #15Dynamics

2Productivity

If ADC converters are managed without priority-based sequencing, then device complexity remains low, but productivity and response time for critical tasks deteriorate

Engineering Contradiction:
Improveresponse time for critical tasksVSAvoidmanagement complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The sequence arbiter acts as an intermediary between multiple conversion sequences and the single ADC converter. It receives requests from different sequences, evaluates their priorities, and mediates access to the ADC accordingly. This intermediary layer enables priority-based management without requiring complex direct control logic in each sequence, simplifying the overall management architecture while improving responsiveness.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system changes the parameter of sequence priority (from equal to differentiated) by introducing priority levels associated with each conversion sequence. The sequence arbiter uses these priority parameters to make scheduling decisions, allowing critical tasks to be responded to more quickly while maintaining manageable complexity through a systematic priority-based approach.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If a single ADC is shared among multiple sequences without priority management, then device complexity is low, but reliability and task completion guarantee deteriorate

Engineering Contradiction:
Improvetask completion guaranteeVSAvoidsequence management complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The sequence arbiter serves as a mediator that guarantees reliable task completion by systematically managing access to the shared ADC. It ensures that high-priority sequences receive timely service while lower-priority sequences wait, providing deterministic behavior and reliability guarantees without requiring multiple ADCs or overly complex management structures.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS8564468B2Sequence arbiter for analog-to-digital conversions
Publication Date: 2013.10.22 STMICROELECTRONICS SRL
  • US8564468B2 patent drawing
  • US8564468B2 patent drawing
  • US8564468B2 patent drawing

AI summary

An analog-to-digital converter device may include an input multiplexer circuit having analog input terminals configured to receive a respective plurality of analog input signals. The input multiplexer circuit may be responsive to a first select input. The device may also include a trigger multiplexer circuit having input terminals configured to receive respective triggering signals. The trigger multiplexer circuit may be responsive to a second select input. Analog-to-digital converter circuitry may be configured to convert the selected analog signal into a digital signal. A sequence arbiter may be coupled to the first and second select inputs and may have input terminals configured to receive a respective plurality of conversion sequence configuration signals. The sequence arbiter may be configured to manage each conversion sequence of the analog-to-digital converter circuitry based upon the relative conversion sequence configuration signal received, and control the conversion sequences.