Time-Interleaved ADC Background Calibration with a Shared Reference Path
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Solution Overview
Problem
Existing A/D conversion apparatuses in time-interleaved systems face challenges in maintaining high-speed operation while ensuring calibration accuracy without interrupting normal conversion processes, often leading to increased circuit size and power consumption.
Innovation Solution
An A/D conversion apparatus with M parallel sub-A/D conversion circuits and a reference A/D conversion circuit, where the control unit compares digital signals from sub-A/D conversion circuits with the reference circuit's output to generate compensation control signals, allowing for continuous calibration during normal operation without stopping the conversion process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If calibration is performed using existing methods with multiple parallel A/D conversion circuits, then conversion speed is improved, but circuit size and power consumption increase
Solution Approach 1:
The reference A/D conversion circuit serves multiple functions: it provides calibration data for all M parallel sub-A/D conversion circuits simultaneously, and operates continuously to enable background calibration without interrupting normal conversion operations. This multi-functional design allows one reference circuit to support the entire parallel conversion system.
Solution Approach 2:
Instead of providing separate calibration circuits for each sub-A/D conversion circuit, the patent uses a single reference A/D conversion circuit that generates calibration data copied and applied to all M parallel circuits. This copying approach reduces circuit size while maintaining calibration capability across all channels.
2Measurement precision
If calibration is performed using existing methods, then conversion accuracy is improved, but normal conversion operation must be interrupted
Solution Approach 1:
The reference A/D conversion circuit operates continuously alongside the M parallel sub-A/D conversion circuits, enabling calibration data to be generated and applied during normal conversion operations without interruption. This continuous operation maintains both high accuracy and productivity simultaneously.
Solution Approach 2:
The reference A/D conversion circuit performs calibration measurements in advance and continuously in the background, preparing calibration data before it is needed by the parallel sub-A/D conversion circuits. This preliminary action ensures calibration is ready without interrupting normal operations.
3Measurement precision
If a reference A/D conversion circuit operates at high speed to match parallel circuits, then calibration accuracy is improved, but power consumption increases
Solution Approach 1:
The reference A/D conversion circuit operates at a lower sampling frequency (fs/(n×M+1)) compared to the equivalent sampling rate of the parallel sub-A/D conversion circuits. This parameter change in operating frequency reduces power consumption while still providing sufficient calibration data for maintaining accuracy of all M parallel circuits.
Data Source
AI summary
An A/D conversion apparatus includes first to M-th ADC connected in parallel converting an analog input signal to digital signals in response to M-phase sampling signals, a reference A/D conversion circuit that converts the analog input signal to a digital signal in response to a divided-by-(n×M+1) sampling signal; and a control unit that compares, for each period of (n×M+1) clock cycles, one of the digital signals from a corresponding one of first to M-th ADC with the digital signal from the reference ADC in a predetermined order of the first to M-th ADC, and generates a compensation control signal based on the comparison result for supply to the corresponding ADC.


