ADC Streaming Access Mode for Reduced Interrupt Load
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing analog-to-digital converters (ADCs) integrated with microcontroller units (MCUs) operate in one-shot or continuous conversion modes, generating frequent interrupts that disrupt data processing algorithms, affecting the performance and real-time control of electronic systems.
Innovation Solution
An ADC with a sequence management circuit, multi-channel input multiplexer, analog-to-digital conversion circuit, sequence output multiplexer, and interrupt generation circuit, allowing operation in a streaming access mode where interrupts are generated only after a preset number of sequences are processed, avoiding untimely interruptions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ADC generates interrupt after each sequence conversion, then data processing can be performed promptly, but execution of data processing algorithm in MCU is disrupted, affecting signal processing performance and speed
Solution Approach 1:
The patent segments the interrupt generation process by introducing a sequence management circuit that groups multiple sequence conversions together before generating a single interrupt. Instead of generating an interrupt after every single sequence conversion, the system accumulates a batch of conversions and then triggers one interrupt signal, thereby reducing interrupt frequency while maintaining data processing reliability
Solution Approach 2:
The patent implements periodic action by using a sequence counter to determine when to generate interrupts based on a preset number of sequences. The sequence management circuit periodically generates interrupt signals after completing a predetermined number of sequence conversions, rather than continuously generating interrupts after each individual conversion, thus reducing disruption to the MCU's data processing algorithm execution
2Device complexity
If ADC operates in one-shot or continuous conversion mode, then conversion simplicity is maintained, but multiple interrupts are generated that adversely affect real-time control and operation
Solution Approach 1:
The patent introduces a sequence management circuit as an intermediary between the ADC conversion process and the interrupt generation mechanism. This intermediary component manages the sequence conversions and controls when interrupts are generated, adding minimal complexity while significantly improving real-time control performance by reducing unnecessary interrupt disruptions
Solution Approach 2:
The patent changes the interrupt generation parameter from 'one interrupt per sequence' to 'one interrupt per N sequences' by introducing a sequence counter with a preset value. This parameter change allows the system to maintain simple conversion modes while improving ease of operation by reducing the frequency of interrupts that disrupt real-time control
Data Source
AI summary
The present invention provides an analog-to-digital converter (ADC), a system-on-chip (SoC) and an electronic control system. In addition to hardware circuits commonly found in conventional ADCs, including a multi-channel input multiplexer, an analog-to-digital conversion (ADC) circuit, a sequence output multiplexer and a sequence data register, the ADC further includes a sequence management circuit and an interrupt generation circuit, which allow the ADC to operate in a streaming access mode, in which it is interrupted only when it has completed the processing of a preset number of sequences. This overcomes the problems with conventional ADCs arising from their frequent interrupts, in particular possible interrupting of a data processing algorithm running on an MCU core due to such frequent interrupts, which may affect real-time control and operation of an electronic system.