ADC Comparator Sub-Capacitor Segmentation for Crosstalk Reduction
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Solution Overview
Problem
The crosstalk characteristics between comparators in column-parallel analog-to-digital converters (ADCs) deteriorate due to parasitic capacitance, leading to issues like image quality degradation, color mixture, and brightness bleeding in CMOS image sensors, especially with the use of comb-shaped wiring capacitors which increase the facing area and parasitic capacitance between adjacent ADCs.
Innovation Solution
The implementation of a comparator with first and second capacitors at differential input ends, each comprising multiple sub-capacitors arranged side by side, which are mixedly arranged in columns to reduce the facing area between adjacent columns, thereby minimizing parasitic capacitance and crosstalk.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If comb-shaped wiring capacitors are used to reduce bias dependency, then capacitance stability is improved, but parasitic capacitance between adjacent ADCs increases due to larger facing area
Solution Approach 1:
The capacitor structure is divided into multiple finger electrodes with gaps between them, transforming a single large capacitor into multiple smaller capacitive elements. This segmentation reduces the continuous facing area between adjacent ADC comparators while maintaining the total capacitance value, thereby reducing parasitic capacitance between adjacent columns.
Solution Approach 2:
The capacitor structure transitions from a planar arrangement to a multi-dimensional finger-like configuration extending in multiple directions. This dimensional change allows the capacitor to achieve the required capacitance value with reduced footprint and minimized parasitic coupling to adjacent columns.
2Reliability
If capacitor size is increased to maintain capacitance value, then capacitance stability is improved, but device area increases leading to larger layout
Solution Approach 1:
The capacitor is segmented into multiple finger electrodes arranged in a compact pattern, allowing the total capacitance to be achieved within a smaller overall area compared to a single large capacitor structure.
Solution Approach 2:
The finger electrodes are arranged in a nested or interdigitated pattern where electrodes from different capacitors are interleaved, maximizing the use of available space and achieving high capacitance density within a compact footprint.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively suppresses signal crosstalk and improves image quality by reducing parasitic capacitance, preventing color mixture and brightness bleeding, while allowing for a more compact layout that maintains desired capacitance values.
Implementation Method 1
One of factors deteriorating the crosstalk characteristics between the adjacent comparators is a parasitic capacitance (a coupling capacitance) that occurs between the comparators to join the two comparators.
Data Source
AI summary
An analog-to-digital converter includes a comparator having paired differential input ends, and a first capacitor and a second capacitor each provided at respective differential input ends. The first capacitor includes a plurality of first sub-capacitors that are coupled side by side with one another, and the second capacitor includes a plurality of second sub-capacitors that are coupled side by side with one another. The plurality of first sub-capacitors and the plurality of second sub-capacitors are mixedly arranged in each column of a plurality of columns.