CMOS Image Sensor A/D Converter Switching to Reduce Crosstalk
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Solution Overview
Problem
Existing A/D converters for CMOS image sensors suffer from noise due to crosstalk between capacitors, leading to image quality degradation, as pixel signals from one row are mixed with those of adjacent rows during conversion.
Innovation Solution
The design incorporates a switch group to alternate the connection of capacitors between the input terminal and the reference voltage line and between the ramp signal line and the comparator, ensuring that each capacitor is isolated during the A/D conversion process, thereby reducing crosstalk via capacitive coupling and common impedance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If two capacitors are provided to a ramp A/D converter for parallel processing, then the operation speed is improved, but noise is mixed in digital data after A/D conversion due to crosstalk between the capacitors
Solution Approach 1:
The patent divides the capacitor system into two independent capacitors (first capacitor and second capacitor) with separate connection paths. Each capacitor is independently connected to the input terminal through switching mechanisms, allowing parallel processing while isolating signal paths to prevent crosstalk between capacitors
Solution Approach 2:
The patent introduces switching mechanisms (switch groups) as intermediary elements between the capacitors and the rest of the circuit. These switches control the connection states, enabling selective isolation of capacitors during different operation phases and preventing direct crosstalk while maintaining parallel processing capability
2Productivity
If pixel signals are written in capacitors sequentially for parallel A/D conversion, then processing throughput is improved, but crosstalk occurs via parasitic capacitance between electrodes
Solution Approach 1:
The patent extracts the problematic parasitic capacitance effect by introducing shielding electrodes between the first and second capacitors. These shielding electrodes are specifically designed to counteract the parasitic capacitance coupling, removing the harmful interaction while preserving the parallel processing function
Solution Approach 2:
Shielding electrodes are introduced as intermediary elements between the capacitors. These electrodes act as mediators that block the parasitic capacitance coupling path while allowing the capacitors to maintain their independent operation for parallel signal processing
3Device complexity
If capacitors share a common reference power supply connection, then circuit complexity is reduced, but crosstalk occurs via common impedance
Solution Approach 1:
The patent segments the reference power supply connection into separate paths for each capacitor. The first capacitor has its own reference connection path while the second capacitor has a separate reference connection path, eliminating the common impedance issue while maintaining reasonable circuit complexity through systematic layout
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively minimizes interlinear crosstalk, allowing for high-frame-rate imaging with improved image quality by ensuring that each pixel signal is converted independently without noise interference.
Implementation Method 1
a first capacitor and a second capacitor; wherein the first analog signal which is input to the input terminal in a state in which the input terminal and the reference voltage line are connected via the first capacitor is converted into digital data
Implementation Method 2
a comparator which has a first input terminal and a second input terminal, and outputs an output signal according to a comparison result between an input voltage supplied to the first input terminal and a threshold voltage supplied to the second input terminal
Data Source
AI summary
In an A/D converter, a first analog signal which is input to an input terminal in a state in which the input terminal and a reference voltage line are connected via a first capacitor is converted into digital data when a reference signal is supplied to the reference signal line in a state in which the reference signal line and a first input terminal of a comparator are connected via the first capacitor. A second analog signal which is input to the input terminal in a state in which the input terminal and the reference voltage line are connected via a second capacitor is converted into digital data when the reference signal is supplied to the reference signal line in a state in which the reference signal line and the first input terminal of the comparator are connected via the second capacitor.