ADC Threshold Combining for Multi-Bit Conversion Accuracy
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Solution Overview
Problem
Existing analog to digital converters face challenges in achieving high conversion accuracy and speed while minimizing complexity and cost, particularly in efficiently testing multiple bits per trial without increasing the number of conversion engines.
Innovation Solution
The use of two digital to analog converters and multiple comparators with a capacitive summing network allows for simultaneous testing of multiple bits by generating multiple decision thresholds, reducing the number of internal converters required and enhancing error correction capabilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If three separate conversion engines are used to determine two bits per trial, then conversion speed is doubled, but device complexity and fabrication cost increase significantly
Solution Approach 1:
The patent combines multiple conversion functions into a single conversion engine by using multiple comparators that share common resources (DAC, capacitor arrays, control logic). Instead of fabricating three separate conversion engines, the invention merges them into one engine that can perform multiple comparisons simultaneously, reducing hardware complexity while maintaining the ability to determine two bits per trial.
Solution Approach 2:
The single conversion engine is designed to be multi-functional by incorporating multiple comparators that can be configured to test different bit combinations. The same DAC and capacitor arrays serve multiple comparison operations, allowing the engine to perform the work of three separate engines through coordinated multi-comparator operations.
2Device complexity
If multiple decision thresholds are tested simultaneously using shared resources, then device complexity is reduced, but measurement precision may be compromised
Solution Approach 1:
The patent segments the comparison function into multiple independent comparators, each handling a specific decision threshold. This segmentation allows each comparator to maintain high precision for its specific threshold while sharing common resources like the DAC and capacitor arrays. The segmentation of the comparison task preserves measurement precision even though the conversion engine is shared.
Solution Approach 2:
The patent introduces an intermediary control mechanism that coordinates the multiple comparators and manages the sharing of common resources. The control logic ensures that each comparator receives the appropriate reference levels and that their results are correctly integrated, maintaining precision despite the shared resource architecture.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables faster conversion with improved accuracy and reduced complexity by allowing two or more bits to be tested at once, correcting errors without additional bit trials, and maintaining high conversion speeds.
Implementation Method 1
a capacitive summing network for forming at least first to third combinations of output from the first and second digital to analog converters such that at least three decision thresholds can be tested at the same time
Data Source
AI summary
An analog to digital converter is provided in which the outputs of first and second digital to analog converters DAC1 and DAC2 are combined in a combining circuit so as to form a plurality of decision thresholds. This enables two or more bits to be determined in a single trial.