ADC Timing Feedback Using Remained Time Measurement
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Solution Overview
Problem
Analog-to-digital conversion circuits face efficiency decreases due to variations in operation time caused by factors like temperature, voltage, and manufacturing process, resulting in mismatches between set conversion time and actual operation time.
Innovation Solution
An analog-to-digital conversion circuit with a remained time measuring mechanism, comprising a digital-to-analog conversion circuit, comparator, control circuit, comparison determining circuit, comparison stage counting circuit, and time accumulating circuit, which samples input voltages, compares output voltages, adjusts digital codes, and accumulates time to measure the difference between set and actual operation times.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the operation time of digital-to-analog circuit and comparator is used for conversion, then the conversion process can be completed, but the efficiency decreases when operation time differs from set conversion time
Solution Approach 1:
The patent implements a feedback mechanism by measuring the actual operation time of the digital-to-analog circuit and comparator, comparing it with the set conversion time, and adjusting the operation time based on the measured difference. This closed-loop feedback system continuously optimizes the conversion process to maintain high efficiency despite variations in operating conditions such as temperature, voltage, and process parameters.
Solution Approach 2:
The patent dynamically adjusts the operation time parameter of the digital-to-analog circuit and comparator based on measured remain time. By changing this critical parameter adaptively rather than using a fixed value, the system compensates for variations caused by temperature, voltage, and manufacturing process differences, thereby maintaining optimal conversion efficiency under different operating conditions.
2Adaptability or versatility
If temperature, process or voltage variations occur, then the operation time varies, but this causes mismatch with set conversion time
Solution Approach 1:
The patent uses feedback to continuously monitor and adjust the operation time based on actual measurements taken under different temperature, voltage, and process conditions. This ensures that despite environmental variations, the conversion process maintains consistent timing by adapting to the actual operating conditions through measured feedback.
Solution Approach 2:
The patent transitions from a static, fixed conversion time setting to a dynamic adjustment mechanism. The operation time becomes a dynamic parameter that automatically adapts to changing environmental conditions (temperature, voltage, process variations) by using measured remain time to continuously optimize the timing, ensuring both adaptability and reliability.
3Device complexity
If a fixed number of comparison stages is used, then the conversion process is simplified, but efficiency decreases when actual operation time differs from expected time
Solution Approach 1:
The patent maintains a fixed number of comparison stages for simplicity but adds a feedback mechanism that measures the actual operation time and uses this information to adjust the timing. This feedback loop compensates for the lack of dynamic stage adjustment while maintaining the simplicity of the fixed-stage architecture, thereby preserving both low complexity and high efficiency.
Solution Approach 2:
The patent introduces a time measurement and adjustment mechanism as an intermediary between the fixed comparison stage structure and the actual conversion process. This intermediary component measures the remain time and adjusts the operation timing accordingly, allowing the simple fixed-stage structure to achieve efficient conversion by mediating the timing through measurement and adjustment.
Data Source
AI summary
The present invention discloses an analog-to-digital conversion circuit having remained time measuring mechanism is provided. A digital-to-analog conversion (DAC) circuit samples input voltages to generate output voltages. A comparator compares the output voltages to generate a comparison result. A control circuit switches a configuration of the DAC circuit by using a digital code according to the comparison result. A comparison determining circuit sets a stage indication signal at a finished state after the comparison result is generated. A comparison stage counting circuit accumulates a termination number according to the stage indication signal to set a conversion indication signal at the finished state when the termination number reaches a predetermined number. A time accumulating circuit starts to accumulate a remained time when the conversion indication signal is at the finished state and finishes accumulation when a sampling indication signal is at a sampling state.