ADC Tracking Circuit Two-Phase Gate Control

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Solution Overview

Problem

Existing analog-to-digital converter (ADC) tracking and hold circuits face bandwidth modulation and signal distortion due to the size and on-resistance of switch transistors, which limits resolution and sampling rate, and bootstrapped tracking operations require large capacitors and transistors, causing parasitic capacitance and signal delay.

Innovation Solution

A two-phase tracking operation is implemented, where the gate of the switch transistor is charged directly to Vdd in the first phase and boosted in the second phase, eliminating the need for a large bootstrapping capacitor and reducing parasitic capacitance, allowing for faster transitions and higher sampling rates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a large bootstrapping capacitor is used to boost the gate voltage, then the tracking accuracy is improved, but the parasitic capacitance increases and signal delay occurs

Engineering Contradiction:
Improvetracking accuracyVSAvoidparasitic capacitance and signal delay
Core Design Contradiction:
Measurement precisionVSObject-affected harmful factors

Solution Approach 1:

The tracking operation is divided into two distinct phases: a first tracking phase where the switch transistor is fully enhanced with gate voltage directly from Vdd, and a second tracking phase where bootstrapping is applied. This segmentation allows the circuit to achieve both fast response (phase 1) and accurate tracking (phase 2) without the drawbacks of using a large bootstrapping capacitor throughout the entire operation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements periodic switching between two tracking modes using clock signals. The first tracking phase uses direct Vdd connection for rapid response, while the second tracking phase uses bootstrapping for precision. This periodic alternation optimizes both speed and accuracy without requiring large capacitors that would cause parasitic effects.

Inventive Principle:
Principle #19Periodic action

2Speed

If the switch transistor size is increased to reduce on-resistance, then the bandwidth is improved, but the circuit size and power consumption increase

Engineering Contradiction:
ImprovebandwidthVSAvoidcircuit size
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent dynamically adjusts the gate voltage of the switch transistor in two stages: initially applying full Vdd for maximum bandwidth and fast response, then transitioning to bootstrapped voltage for precise tracking. This dynamic control allows smaller transistor sizes to achieve the same performance as larger transistors would provide in continuous operation, reducing circuit size while maintaining bandwidth.

Inventive Principle:
Principle #15Dynamics

3Measurement precision

If bootstrapped tracking is used to improve linearity, then the signal accuracy is improved, but the circuit complexity and power consumption increase

Engineering Contradiction:
Improvesignal accuracyVSAvoidcircuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

Instead of applying bootstrapping continuously, the patent applies it only during the second tracking phase when precise linearity is needed. During the first tracking phase, direct Vdd connection is used which is simpler and consumes less power. This partial application of bootstrapping achieves the necessary signal accuracy while minimizing circuit complexity and power consumption.

Inventive Principle:
Principle #16Partial or excessive action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances bandwidth, sampling rate, and linearity, enabling higher resolution and faster sampling rates while reducing circuit size and power consumption, making it suitable for high-speed applications like radar and wireless communications.

Implementation Method 1

the gate of the switch transistor is charged directly to Vdd in a first tracking phase

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 2

the power source circuit charges a parasitic capacitance

Methodology Applied
Scientific EffectParasitic capacitance: Parasitic Capacitance

Data Source

PatentEP2518730B1Tracking and hold operations for an analog-to-digital converter
Publication Date: 2019.08.14 NXP BV
  • EP2518730B1 patent drawingFigure 1A~1B
  • EP2518730B1 patent drawingFigure 2A~2B
  • EP2518730B1 patent drawingFigure 3~4

AI summary

Various exemplary embodiments relate to a tracking system and method. The system includes a transistor switch having a gate node and a source node, a power source circuit connected to the gate node, and a bootstrapping circuit connected to the source node and to the gate node. The power source circuit charges the switch during a first tracking phase, and the bootstrapping circuit charges the switch during a second tracking phase.