ADC Oversampling Using Variable-Bit Sampling

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Solution Overview

Problem

Existing analog to digital converters (ADCs) using oversampling suffer from increased time and power consumption due to the need to sample and measure all bits during each oversampling process.

Innovation Solution

The proposed ADC employs a method that identifies variable and static bit positions within the sampling process, allowing only variable bits to be sampled, with static bits retaining their values from the previous sample, thereby reducing the number of necessary measurements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If all bits are sampled during oversampling process, then measurement accuracy is maintained, but data acquisition time increases

Engineering Contradiction:
Improvemeasurement accuracyVSAvoiddata acquisition time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent segments the bit positions into two categories: variable bits that require sampling and static bits that retain previous values. This segmentation allows the system to process only the necessary portion of data (variable bits) while skipping redundant operations (static bits), thereby reducing data acquisition time without compromising measurement accuracy for the bits that actually change.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Instead of performing complete sampling of all bits in each oversampling cycle, the patent applies partial action by sampling only the variable bit positions. This partial sampling approach is sufficient to maintain measurement accuracy for the changing parameters while significantly reducing the time required for data acquisition.

Inventive Principle:
Principle #16Partial or excessive action

2Loss of information

If all bits are sampled during oversampling process, then complete signal information is captured, but power consumption increases

Engineering Contradiction:
Improvesignal informationVSAvoidpower consumption
Core Design Contradiction:
Loss of informationVSUse of energy by moving object

Solution Approach 1:

The patent segments the sampling operation to distinguish between variable bits requiring measurement and static bits retaining previous values. By identifying and processing only the variable bit positions, the system captures all necessary signal information while minimizing the number of active sampling operations, thereby reducing power consumption.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent extracts and processes only the essential variable bit positions from the complete set of bits, excluding static bits from the sampling process. This extraction approach ensures that all critical signal information contained in the variable bits is captured while eliminating unnecessary power consumption associated with sampling static bits.

Inventive Principle:
Principle #2Taking out (Extraction)

3Measurement precision

If oversampling is performed with full bit measurement, then effective resolution is increased, but device complexity increases

Engineering Contradiction:
Improveeffective resolutionVSAvoidprocessing complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent simplifies device complexity by segmenting the oversampling process to handle only variable bit positions. This segmentation reduces the computational burden and processing complexity compared to measuring all bits, while still achieving the desired effective resolution through targeted sampling of the changing signal components.

Inventive Principle:
Principle #1Segmentation

4Reliability

If all bit positions are measured in each sample, then sampling completeness is ensured, but processing speed decreases

Engineering Contradiction:
Improvesampling completenessVSAvoidprocessing speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent maintains sampling completeness for the variable bit positions while improving processing speed by excluding static bits from the measurement process. This segmented approach ensures that all relevant signal information is captured with high reliability while significantly accelerating the processing speed by reducing the number of bits requiring measurement in each sampling cycle.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12519481B2Analog to digital converter for converting analog signal to digital signal
Publication Date: 2026.01.06 RENESAS DESIGN TECH INC
  • US12519481B2 patent drawing
  • US12519481B2 patent drawing
  • US12519481B2 patent drawing

AI summary

An analog to digital converter configured to acquire a first sample comprising a first plurality of bits representative of a digital signal, determine one or more bit positions within the first plurality of bits that are variable, determine one or more bit positions within the first plurality of bits that are static, and acquire a second sample after having acquired the first sample, the second sample comprising a second plurality of bits representative of the digital signal, at least a portion of the one or more bit positions that are variable have their bit values generated by sampling the analog signal, and each of the one or more bit positions that are static have their bit values set to the same bit value as the bit value of the corresponding bit position in the first sample.