ADC Output Voltage Clipping for Low-Power Image Sensor Conversion
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Solution Overview
Problem
Analog-to-digital converters (ADCs) in image sensors face challenges in reducing power consumption while maintaining high resolution and processing efficiency, leading to increased power consumption and parasitic capacitance.
Innovation Solution
The proposed solution involves an analog-to-digital converting circuit that uses output voltage clipping and a dual power supply voltage system, where a first amplifier generates output signals based on a higher power supply voltage and a second amplifier adjusts the voltage level of these signals to a level equal to or less than a lower power supply voltage, reducing power consumption and parasitic capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If an ADC processes many signals within the same time or provides improved resolution for each signal, then measurement precision and productivity are improved, but power consumption increases
Solution Approach 1:
The patent applies dynamics by making the power supply voltage to the second amplifier adjustable and time-dependent. The voltage is set to a first level (higher) during comparison operations requiring high precision, and reduced to a second level (lower) during periods when high precision is not required, such as between signal processing operations. This dynamic voltage adjustment allows the system to maintain measurement precision when needed while reducing power consumption during idle or low-precision periods.
2Productivity
If an ADC processes many signals within the same time, then productivity is improved, but power consumption increases
Solution Approach 1:
The patent implements periodic action through time-division multiplexing where the ADC processes multiple signals in sequential periods rather than simultaneously. The first amplifier processes one signal during a first period, then the same amplifier processes another signal during a second period. Between these processing periods, the power supply voltage to the second amplifier is reduced to a lower level. This periodic processing approach enables high productivity through multiple signals per unit time while minimizing power consumption by keeping the voltage at a lower level during idle periods between signal processing operations.
3Measurement precision
If the second amplifier operates at a higher voltage level, then measurement precision is improved, but power consumption increases
Solution Approach 1:
The patent applies dynamics by making the power supply voltage to the second amplifier adjustable and time-dependent. The voltage is set to a first level (higher) during comparison operations requiring high precision, and reduced to a second level (lower) during periods when high precision is not required, such as between signal processing operations. This dynamic voltage adjustment allows the system to maintain measurement precision when needed while reducing power consumption during idle or low-precision periods.
Data Source
AI summary
In some embodiments, a circuit includes a first amplifier, a second amplifier, and a counter. The first amplifier operates based on a first power supply voltage and generates a first output signal by comparing a ramp signal and a reset signal of a pixel signal output from a pixel array during a first operation period and comparing the ramp signal and an image signal of the pixel signal output from the pixel array during a second operation period. The second amplifier operates based on the first power supply voltage, generates a second output signal based on the first output signal and adjust a voltage level of the second output signal from a low level to a third level. The counter operates based on a second power supply voltage, counts pulses of the second output signal, and outputs a counting result as a digital signal.