ADC Stage Voltage Scaling for Single-Ended and Differential Inputs

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Solution Overview

Problem

Existing analog-to-digital converters (ADCs) require separate blocks for input voltage and reference voltage scaling, which consume additional area and power, and are not optimized for handling both single-ended and differential rail-to-rail inputs efficiently.

Innovation Solution

The integration of input voltage and reference voltage scaling, along with initial residue calculation, into a single operation within the ADC stage using a comparator and logic circuit with trip points and a switched capacitor circuit, allowing for efficient scaling and processing of both single-ended and differential inputs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If separate configurable blocks are used for voltage and reference voltage scaling, then the ADC can handle both single-ended and differential rail-to-rail inputs, but the area and power consumption increase

Engineering Contradiction:
Improvecapability to handle both single-ended and differential inputsVSAvoidADC circuit area
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent combines the voltage scaling block and reference voltage scaling block into a single integrated scaling operation within the ADC stage. The switched capacitor circuit performs both input voltage scaling and reference voltage scaling simultaneously, eliminating the need for separate configurable blocks and reducing overall circuit area while maintaining the capability to handle both single-ended and differential inputs

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The ADC stage is designed with a universal scaling mechanism that can handle both single-ended and differential inputs through the same circuitry. The switched capacitor circuit with configurable trip points provides multi-functional operation, allowing the same hardware to perform voltage scaling, reference scaling, and initial residue calculation for different input types without requiring separate dedicated blocks

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If separate configurable blocks are used for voltage scaling, then the ADC can handle both single-ended and differential inputs, but the power consumption increases

Engineering Contradiction:
Improvecapability to handle both single-ended and differential inputsVSAvoidADC power consumption
Core Design Contradiction:
Adaptability or versatilityVSUse of energy by stationary object

Solution Approach 1:

The patent merges the voltage scaling and reference voltage scaling operations into a single integrated process within the ADC stage. By performing both scaling operations simultaneously using the same switched capacitor circuit, the patent eliminates redundant power-consuming operations and reduces overall power consumption while maintaining full adaptability for handling both single-ended and differential inputs

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The integrated scaling mechanism provides universal operation for both single-ended and differential inputs through a single power-efficient circuit. The switched capacitor circuit with configurable trip points delivers multi-functional performance without requiring separate power-intensive scaling blocks, thereby reducing total power consumption while preserving input versatility

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Ease of manufacture

If separate scaling blocks are used, then voltage scaling can be performed, but the processing time increases due to multiple operations

Engineering Contradiction:
Improvevoltage scaling capabilityVSAvoidprocessing time
Core Design Contradiction:
Ease of manufactureVSLoss of time

Solution Approach 1:

The patent combines voltage scaling, reference voltage scaling, and initial residue calculation into a single integrated operation within the ADC stage. The switched capacitor circuit performs all these functions simultaneously in one processing cycle, eliminating the sequential execution of separate scaling blocks and thereby reducing overall processing time while maintaining full voltage scaling capability

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces processing time and circuitry, enabling ADCs to handle both single-ended and differential inputs more efficiently, while being suitable for both pipelined and cyclic ADC architectures, thereby improving performance and reducing power consumption.

Implementation Method 1

The switched capacitor circuit is configured to sample the unscaled input voltage to generate an unscaled input voltage sample

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 2

the operational amplifier is configured, prior to an initial residue calculation cycle, to compare a magnitude of an unscaled input voltage to upper and lower unscaled voltage trip points, to generate an initial output bit

Methodology Applied
Scientific EffectVoltage comparison:

Implementation Method 3

to scale the unscaled input voltage sample and generate an initial residue voltage having an initial residue magnitude

Methodology Applied
Scientific EffectVoltage scaling:

Data Source

PatentUS8823566B2Analog to digital conversion architecture and method with input and reference voltage scaling
Publication Date: 2014.09.02 NXP USA INC
  • US8823566B2 patent drawing
  • US8823566B2 patent drawing
  • US8823566B2 patent drawing

AI summary

An analog-to-digital converter stage includes: a comparator and logic circuit having first upper and lower unscaled voltage trip points that are different than upper and lower residue voltage trip points; and a switched capacitor circuit. The comparator and logic circuit is configured prior to an initial residue calculation cycle to compare a magnitude of an unscaled input voltage to the first upper and lower unscaled voltage trip points, to generate an initial output bit, and to generate a voltage scaling and gain control signal. The switched capacitor circuit is configured to sample the unscaled input voltage, to receive a reference voltage, and to receive the voltage scaling and gain control signal for selectively controlling a subset of switches of the switched capacitor circuit to scale the unscaled input voltage sample and reference voltage and generate an initial residue voltage during a single operation of the initial residue calculation cycle.