Address Bit Security Signaling for Memory Integrity
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Solution Overview
Problem
Computer systems are vulnerable to attacks that modify or alter program code stored in memory, leading to unintended program behavior and security breaches, as existing security measures are not sufficient to prevent unauthorized changes in system memory.
Innovation Solution
A secure computing environment is implemented using a CPU with a security mechanism that employs address bits to enable encryption and integrity checks, where data is encrypted before storage in system memory and an integrity check value is generated and stored in secure memory to verify data integrity upon retrieval.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If extensive encryption techniques and tamper evident mechanisms are employed to secure data in system memory, then data security and integrity are improved, but device complexity and processing overhead increase
Solution Approach 1:
The patent applies preliminary action by pre-configuring security attributes in the page table entries before memory access occurs. The memory management unit checks these pre-set attributes during address translation and automatically applies encryption or integrity verification as needed, rather than adding complex security processing at each memory access point.
Solution Approach 2:
The patent makes the address bus and page table structure serve multiple functions: traditional address translation and now also security attribute signaling. The same page table infrastructure used for virtual-to-physical address mapping is also used to convey security instructions, eliminating the need for separate security control mechanisms.
2Reliability
If security checks are performed on all data in system memory, then data integrity is improved, but processing speed and system performance deteriorate
Solution Approach 1:
The patent applies local quality by selectively applying security measures only to specific memory pages that have security attributes set in their page table entries. Pages marked with security attributes undergo encryption or integrity verification, while other pages are accessed normally without additional security processing, thus maintaining performance for non-sensitive data.
Solution Approach 2:
The patent implements partial action by applying security measures only to the extent necessary - only to memory pages that require protection based on their security attributes. This avoids the performance penalty of universal security checking while still providing protection where needed.
3Measurement precision
If address bits are used to signal security attributes, then security control precision is improved, but address space utilization efficiency worsens
Solution Approach 1:
The patent makes the address bus and page table structure serve multiple functions: traditional address translation and now also security attribute signaling. The same page table infrastructure used for virtual-to-physical address mapping is also used to convey security instructions, eliminating the need for separate security control mechanisms.
Solution Approach 2:
The patent changes the parameters of existing page table entries to include security attributes. By modifying the structure of page table entries to include security control bits, the system gains precise security control without adding separate address space, as the security information is embedded within the existing address translation infrastructure.
Data Source
AI summary
A integrity control system uses the address bits to enable encryption and/or protection of data stored in a system memory. The encryption and protection mechanisms are coupled to the CPU by way of a data bus and to the memory by way of a data bus. An address bus that determines the location of data to be stored or retrieved from system memory has a plurality of address lines. At least one of the address lines enabling the encryption mechanism to encrypt data before storage in the memory and to decrypt data after retrieval from memory. Another address line enables the protection mechanism to generate a hash of the data. The hash is stored and used to determine whether data has been altered while stored in system memory.